74ACQ241 Octal Buffer/Line Driver with 3-STATE Outputs
January 1990
Revised August 2001
74ACQ241
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The ACQ241 is an octal buffer and line driver designed to
be employed as a memory address driver, clock driver and
bus oriented transmitter or receiver which provides
improved PC board density. The ACQ utilizes Fairchild
FACT Quiet Series
technology to guarantee quiet output
switching and improved dynamic threshold performance.
FACT Quiet Series features GTO
output control and
undershoot corrector in addition to a split ground bus for
superior performance.
Features
s
I
CC
and I
OZ
reduced by 50%
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed pin-to-pin skew AC performance
s
Improved latch-up immunity
s
3-STATE outputs drive bus lines or buffer memory
address registers
s
Outputs source/sink 24 mA
s
Faster prop delays than the standard AC
Ordering Code:
Order Number
74ACQ241SC
74ACQ241PC
Package Number
M20B
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Pin Descriptions
Pin Names
OE
1
, OE
2
I
0
–I
7
O
0
–O
7
Description
3-STATE Output Enable Inputs
Inputs
Outputs
Truth Tables
Inputs
OE
1
I
n
L
H
X
Inputs
OE
2
H
H
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Outputs
(Pins 12, 14, 16, 18)
L
H
Z
Outputs
I
n
L
H
X
X
=
Immaterial
Z
=
High Impedance
Connection Diagram
L
L
H
(Pins 3, 5, 7, 9)
L
H
Z
FACT, FACT Quiet Series, and GTO are trademarks of Fairchild Semiconductor Corporation.
© 2001 Fairchild Semiconductor Corporation
DS010642
www.fairchildsemi.com
74ACQ241
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
= −
0.5V
V
I
=
V
CC
+
0.5V
DC Input Voltage (V
I
)
DC Output Diode Current (I
OK
)
V
O
= −
0.5V
V
O
=
V
CC
+
0.5V
DC Output Voltage (V
O
)
DC Output Source
or Sink Current (I
O
)
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
Storage Temperature (T
STG
)
DC Latch-Up Source or
Sink Current
Junction Temperature (T
J
)
PDIP
140
°
C
−
0.5V to
+
7.0V
−
20 mA
+
20 mA
−
0.5V to V
CC
+
0.5V
−
20 mA
+
20 mA
−
0.5V to V
CC
+
0.5V
±
50 mA
±
50 mA
−
65
°
C to
+
150
°
C
±
300 mA
Recommended Operating
Conditions
Supply Voltage (V
CC
)
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Minimum Input Edge Rate
∆
V/
∆
t
V
IN
from 30% to 70% of V
CC
V
CC
@ 3.0V, 4.5V, 5.5V
2.0V to 6.0V
0V to V
CC
0V to V
CC
−
40
°
C to
+
85
°
C
125 mV/ns
Note 1:
Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics
Symbol
V
IH
Parameter
Minimum High Level
Input Voltage
V
IL
Maximum Low Level
Input Voltage
V
OH
Minimum High Level
Output Voltage
V
CC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
V
OL
Maximum Low Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
I
IN
(Note 4)
I
OLD
I
OHD
I
CC
(Note 4)
I
OZ
Maximum Input
Leakage Current
Minimum Dynamic
Output Current (Note 3)
Maximum Quiescent
Supply Current
Maximum 3-STATE
Leakage Current
V
OLP
Quiet Output
Maximum Dynamic V
OL
5.5
±
0.25
±
2.5
µA
5.5
5.5
5.5
5.5
4.0
0.002
0.001
0.001
T
A
= +25°C
Typ
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
±
0.1
T
A
= −40°C
to
+85°C
Guaranteed Limits
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
V
IN
=
V
IL
or V
IH
2.46
3.76
4.76
0.1
0.1
0.1
V
IN
=
V
IL
or V
IH
0.44
0.44
0.44
±
1.0
75
−75
40.0
µA
mA
mA
µA
V
I
OL
=
12 mA
I
OL
= 24 mA
I
OL
=
24 mA (Note 2)
V
I
=
V
CC
,
GND
V
OLD
=
1.65V Max
V
OHD
=
3.85V Min
V
IN
=
V
CC
or GND
V
I
(OE)
=
V
IL
, V
IH
V
I
=
V
CC
, GND
V
O
=
V
CC
, GND
5.0
1.1
1.5
V
Figures 1, 2
(Note 5)(Note 6)
V
I
OUT
=
50
µA
V
I
OH
= −12
mA
I
OH
= −24
mA
I
OH
= −24
mA (Note 2)
V
I
OUT
= −50 µA
V
V
OUT
=
0.1V
or V
CC
−
0.1V
V
Units
Conditions
V
OUT
=
0.1V
or V
CC
−
0.1V
www.fairchildsemi.com
2
74ACQ241
DC Electrical Characteristics
Symbol
V
OLV
V
IHD
V
ILD
Parameter
Quiet Output
Minimum Dynamic V
OL
Minimum High Level
Dynamic Input Voltage
Maximum Low Level
Dynamic Input Voltage
V
CC
(V)
5.0
5.0
5.0
(Continued)
T
A
= +25°C
Typ
−0.6
3.1
1.9
T
A
= −40°C
to
+85°C
Guaranteed Limits
−1.2
3.5
1.5
V
V
V
Figures 1, 2
(Note 5)(Note 6)
(Note 5)(Note 7)
(Note 5)(Note 7)
Units
Conditions
Note 2:
All outputs loaded; thresholds on input associated with output under test.
Note 3:
Maximum test duration 2.0 ms, one output loaded at a time.
Note 4:
I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
Note 5:
DIP package.
Note 6:
Max number of outputs defined as (n). Data Inputs are driven 0V to 5V. One output @ GND.
Note 7:
Max number of Data Inputs (n) switching. n−1 Inputs switching 0V to 5V. Input-under-test switching: 5V to threshold (V
ILD
), 0V to threshold (V
IHD
),
f
=
1 MHz.
AC Electrical Characteristics
V
CC
Symbol
Parameter
(V)
(Note 8)
t
PHL
t
PLH
t
PZL
t
PZH
t
PHZ
t
PLZ
t
OSHL
t
OSLH
Output to Output
Skew Data to Output (Note 9)
Output Disable Time
Propagation Delay
Data to Output
Output Enable Time
3.3
5.0
3.3
5.0
3.3
5.0
3.3
Min
2.0
1.5
2.5
1.5
1.0
1.0
T
A
= +25°C
C
L
=
50 pF
Typ
6.5
4.5
8.0
5.5
8.5
5.5
1.0
Max
9.0
6.0
13.0
8.5
14.5
9.5
1.5
T
A
= −40°C
to
+85°C
C
L
=
50 pF
Min
2.0
1.5
2.5
1.5
1.0
1.0
Max
9.5
6.5
13.5
9.0
15.0
10.0
1.5
ns
ns
ns
ns
Units
Note 8:
Voltage Range 5.0 is 5.0V
±
0.5V. Voltage Range 3.3 is 3.3V
±
0.3V.
Note 9:
Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by design.
Capacitance
Symbol
C
IN
C
PD
Parameter
Input Capacitance
Power Dissipation Capacitance
Typ
4.5
70
Units
pF
pF
V
CC
=
OPEN
V
CC
=
5.0V
Conditions
3
www.fairchildsemi.com
74ACQ241
FACT Noise Characteristics
The setup of a noise characteristics measurement is critical
to the accuracy and repeatability of the tests. The following
is a brief description of the setup used to measure the
noise characteristics of FACT.
Equipment:
Hewlett Packard Model 8180A Word Generator
PC-163A Test Fixture
Tektronics Model 7854 Oscilloscope
Procedure:
1. Verify Test Fixture Loading: Standard Load 50 pF,
500
Ω
.
2. Deskew the HFS generator so that no two channels
have greater than 150 ps skew between them. This
requires that the oscilloscope be deskewed first. It is
important to deskew the HFS generator channels
before testing. This will ensure that the outputs switch
simultaneously.
3. Terminate all inputs and outputs to ensure proper load-
ing of the outputs and that the input levels are at the
correct voltage.
4. Set the HFS generator to toggle all but one output at a
frequency of 1 MHz. Greater frequencies will increase
DUT heating and effect the results of the measure-
ment.
5. Set the word generator input levels at 0V LOW and 3V
HIGH for ACT devices and 0V LOW and 5V HIGH for
AC devices. Verify levels with an oscilloscope
V
OLP
/V
OLV
and V
OHP
/V
OHV
:
• Determine the quiet output pin that demonstrates the
greatest noise levels. The worst case pin will usually be
the furthest from the ground pin. Monitor the output volt-
ages using a 50
Ω
coaxial cable plugged into a standard
SMB type connector on the test fixture. Do not use an
active FET probe.
• Measure V
OLP
and V
OLV
on the quiet output during the
worst case transition for active and enable. Measure
V
OHP
and V
OHV
on the quiet output during the worst
case active and enable transition.
• Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
V
ILD
and V
IHD
:
• Monitor one of the switching outputs using a 50
Ω
coaxial
cable plugged into a standard SMB type connector on
the test fixture. Do not use an active FET probe.
• First increase the input LOW voltage level, V
IL
, until the
output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds V
IL
limits, or on output HIGH levels that
exceed V
IH
limits. The input LOW voltage level at which
oscillation occurs is defined as V
ILD
.
• Next decrease the input HIGH voltage level, V
IH
, until
the output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds V
IL
limits, or on output HIGH levels that
exceed V
IH
limits. The input HIGH voltage level at which
oscillation occurs is defined as V
IHD
.
• Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
FIGURE 1. Quiet Output Noise Voltage Waveforms
Note 10:
V
OHV
and V
OLP
are measured with respect to ground reference.
Note 11:
Input pulses have the following characteristics: f
=
1 MHz, t
r
=
3 ns, t
f
=
3 ns, skew
<
150 ps.
FIGURE 2. Simultaneous Switching Test Circuit
www.fairchildsemi.com
4
模拟与混合信号
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
