NXP Semiconductors
Data Sheet: Technical Data
K82P121M150SF5
Rev. 2, 11/2016
Kinetis K82 Sub-Family
High performance ARM® Cortex®-M4F MCU with up to
256KB of Flash, 256KB of SRAM, Full Speed USB
connectivity, enhanced Security, and QuadSPI for
interfacing to Serial NOR flash
The K82 sub-family extends Kinetis products with new hardware
security mechanisms including decryption from serial NOR flash
memory, AES128, AES256 with side band attack protection, and
Elliptical Curve Cryptography acceleration. These advancements
are done while maintaining a high level of compatibility with
previous Kinetis devices. The MCUs range in total flash space
upto 256KB and have 256KB of SRAM. The QuadSPI interface
supports connections to Non-Volatile Memory for data or code.
The extended memory resources and new security features
allow developers to enhance their embedded applications with
greater capability.
MK82FN256VDC15
MK82FN256VLL15
MK82FN256VLQ15
MK82FN256CAx15
121 XFBGA (DC)
8 x 8 x 0.5 mm Pitch
0.65 mm
100 LQFP (LL)
14 x 14 x 1.7 Pitch
0.5mm
144 LQFP (LQ)
20 x 20 x 1.6 Pitch 0.5
mm
121 WLCSP (Ax)
4.64 mm x 4.53 mm
Performance
• Up to 150 MHz ARM Cortex-M4 based core with DSP
instructions and Single Precision Floating Point unit
Memories and memory expansion
• Up to 256 KB program flash with 256 KB RAM
• FlexBus external bus interface and SDRAM controller
Operating Characteristics
• Dual QuadSPI with OTF decryption and XIP
• 32 KB Boot ROM with built in bootloader
• Main VDD Voltage and Flash write voltage
• Supports SDR and DDR serial flash and octal configurations
range:1.71V–3.6 V
• Temperature range (ambient): -40 to 105°C
System and Clocks
• Independent V
DDIO
for PORTE (QuadSPI):
• Multiple low-power modes
1.71V–3.6 V
• Memory protection unit with multi-master protection
Communication interfaces
• 3 to 32 MHz main crystal oscillator
• 32 kHz low power crystal oscillator
• USB full-/low-speed On-the-Go controller
• 48 MHz internal reference
• Secure Digital Host Controller (SDHC) and
FlexIO
Timers
• One I2S module, three SPI, four I2C modules
• One 4 ch-Periodic interrupt timer
and five LPUART modules
• Two 16-bit low-power timer PWM modules
Security
• Two 8-ch motor control/general purpose/PWM timers
• Two 2-ch quadrature decoder/general purpose timers
• LP Trusted Crypto (LTC) hardware
• Real-time clock with independent 3.3V power domain
accelerators supporting AES, DES, 3DES,
• Programmable delay block
RSA and ECC
• Hardware random-number generator
Human-machine interface
• Supports DES, AES, SHA accelerator (CAU)
• Low-power hardware touch sensor interface (TSI)
• Multiple levels of embedded flash security
• General-purpose input/output
Analog modules
• One 16-bit SAR ADCs, two 6-bit DAC and one
12-bit DAC
• Two analog comparators (CMP) containing a
6-bit DAC and programmable reference input
• Voltage reference 1.2V
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.
Ordering Information
Part Number
Flash
MK82FN256VDC15
MK82FN256VLL15
MK82FN256CAx15R
1
MK82FN256VLQ15
2
256 KB
256 KB
256 KB
256 KB
Memory
SRAM
256 KB
256 KB
256 KB
256 KB
87
66
87
102
Maximum number of I\O's
1. The 121-pin WLCSP package for this product is not yet available, however it is included in a Package Your Way
program for Kinetis MCUs. Visit
nxp.com/KPYW
for more details.
2. The 144-pin LQFP package for this product is not yet available, however it is included in a Package Your Way program
for Kinetis MCUs. Visit
nxp.com/KPYW
for more details.
Device Revision Number
Device Mask Set Number
1N03P
SIM_SDID[REVID]
0001
JTAG ID Register[PRN]
0001
Related Resources
Type
Product
Selector
Fact Sheet
Reference
Manual
Data Sheet
Chip Errata
Package
drawing
Description
The Product Selector lets you find the right Kinetis part for your design.
The Fact Sheet gives overview of the product key features and its uses.
The Reference Manual contains a comprehensive description of the
structure and function (operation) of a device.
The Data Sheet includes electrical characteristics and signal
connections.
Resource
K-Series Product Selector
K8x Fact Sheet
K82P121M150SF5RM
1
This document.
The chip mask set Errata provides additional or corrective information for Kinetis_K_1N03P
1
a particular device mask set.
Package dimensions are provided in package drawings.
• LQFP 100-pin:
98ASS23308W
1
• XFBGA 121-pin:
98ASA00595D
1
• LQFP 144-pin:
98ASS23177W
2
• WLCSP 121-pin: Under
development
2
1. To find the associated resource, go to
http://www.nxp.com
and perform a search using this term.
2. This package for this product is not yet available, however it is included in a Package Your Way program for Kinetis
MCUs. Visit
nxp.com/KPYW
for more details.
2
NXP Semiconductors
Kinetis K82 Sub-Family, Rev. 2, 11/2016
Cryptographic
accelerator
(CAU)
ARM Cortex M4
PPB
AHB-AP
RTC
OSC
Trace
Port
JTAG &
Serial Wire
TPIU
SWJ-DP
ETM
DSP
FPU
System
NVIC
ITM
FPB
DWT
PIT
WIC
DMA
Mux x2
USB/
FS/LS
OSC
MCG
IRC
48 MHz
IRC
4 MHz
PLL
FLL
ICODE
DCODE
DCD
192 KByte
64 KByte
SRAM
MUX
Cache
8 Kbyte
8 Kbyte
eDMA
eSDHC
M0
M1
M3
Crossbar Switch (XBS)
S4
SDRAMC
FlexBus
M2
S2
M4
S3
RGPIO
System Memory Protection Unit (MPU)
S1
S5
OTFAD
QSPI
BOOT
ROM
S0
Flash
Controller
x128
Flash
256 KByte
6-bit DAC
& CMP x2
16-bit ADC
LP Trusted
Cryptography
BME2
AHB to IPS 0
AHB to IPS 1
FlexIO
SPI
x3
I2C
x4
TSI
EMVSIM
x2
LPUART
x5
CMT
PDB
FlexTimer
x4
TPM
x2
Low-power
timer x2
PIT
TRNG
LP Trusted Cryptography supports:
-AES128/192/256
-PKHA RSA/ECC with timing equalization protection
-3DES
Vref
CRC
12-bit DAC
I2S
RTC
PMC
Figure 1. K82 Block Diagram
Kinetis K82 Sub-Family, Rev. 2, 11/2016
3
NXP Semiconductors
Table of Contents
1 Ratings.................................................................................... 5
1.1 Thermal handling ratings................................................. 5
1.2 Moisture handling ratings................................................ 5
1.3 ESD handling ratings....................................................... 5
1.4 Voltage and current operating ratings............................. 5
1.4.1
Recommended POR Sequencing .................... 6
2 General................................................................................... 8
2.1 AC electrical characteristics.............................................8
2.2 Nonswitching electrical specifications..............................9
2.2.1
Voltage and current operating requirements.....9
2.2.2
HVD, LVD and POR operating requirements....10
2.2.3
Voltage and current operating behaviors.......... 11
2.2.4
Power mode transition operating behaviors......12
2.2.5
Power consumption operating behaviors.......... 14
2.2.6
Electromagnetic Compatibility (EMC)
specifications.....................................................20
2.2.7
Designing with radiated emissions in mind....... 20
2.2.8
Capacitance attributes...................................... 20
2.3 Switching specifications...................................................21
2.3.1
Device clock specifications............................... 21
2.3.2
General switching specifications....................... 21
2.4 Thermal specifications..................................................... 23
2.4.1
Thermal operating requirements....................... 23
2.4.2
Thermal attributes............................................. 23
3 Peripheral operating requirements and behaviors.................. 24
3.1 Core modules.................................................................. 24
3.1.1
Debug trace timing specifications..................... 24
3.1.2
JTAG electricals................................................ 25
3.2 Clock modules................................................................. 28
3.2.1
MCG specifications........................................... 28
3.2.2
IRC48M specifications...................................... 31
3.2.3
Oscillator electrical specifications..................... 32
3.2.4
32 kHz oscillator electrical characteristics.........34
3.3 Memories and memory interfaces................................... 34
3.3.1
QuadSPI AC specifications............................... 34
3.3.2
Flash electrical specifications............................39
3.3.3
Flexbus switching specifications....................... 41
3.3.4
SDRAM controller specifications.......................43
3.4 Security and integrity modules........................................ 46
3.5 Analog............................................................................. 46
3.5.1
ADC electrical specifications.............................46
3.5.2
3.5.3
CMP and 6-bit DAC electrical specifications.....50
12-bit DAC electrical characteristics................. 52
3.5.4
Voltage reference electrical specifications........ 55
3.6 Timers..............................................................................56
3.7 Communication interfaces............................................... 56
3.7.1
3.7.2
3.7.3
3.7.4
3.7.5
EMV SIM specifications.................................... 57
USB VREG electrical specifications..................61
USB DCD electrical specifications.................... 62
DSPI switching specifications (limited voltage
range)................................................................63
DSPI switching specifications (full voltage
range)................................................................64
3.7.6
I2C switching specifications.............................. 66
3.7.7
UART switching specifications.......................... 66
3.7.8
LPUART switching specifications......................66
3.7.9
SDHC specifications......................................... 67
3.7.10 I2S switching specifications.............................. 68
3.8 Human-machine interfaces (HMI)....................................74
3.8.1
TSI electrical specifications...............................74
4 Dimensions............................................................................. 74
4.1 Obtaining package dimensions....................................... 74
5 Pinout...................................................................................... 75
5.1 K82 Signal Multiplexing and Pin Assignments.................75
5.2 Recommended connection for unused analog and
digital pins........................................................................82
5.3 K82 Pinouts..................................................................... 84
6 Ordering parts......................................................................... 88
6.1 Determining valid orderable parts....................................88
7 Part identification.....................................................................89
7.1 Description.......................................................................89
7.2 Format............................................................................. 89
7.3 Fields............................................................................... 89
7.4 Example...........................................................................90
8 Terminology and guidelines.................................................... 90
8.1 Definitions........................................................................ 90
8.2 Examples......................................................................... 91
8.3 Typical-value conditions.................................................. 91
8.4 Relationship between ratings and operating
requirements....................................................................92
8.5 Guidelines for ratings and operating requirements..........92
9 Revision History...................................................................... 92
4
NXP Semiconductors
Kinetis K82 Sub-Family, Rev. 2, 11/2016
Ratings
1 Ratings
1.1 Thermal handling ratings
Symbol
T
STG
T
SDR
Description
Storage temperature
Solder temperature, lead-free
Min.
–55
—
Max.
150
260
Unit
°C
°C
Notes
1
2
1. Determined according to JEDEC Standard JESD22-A103,
High Temperature Storage Life.
2. Determined according to IPC/JEDEC Standard J-STD-020,
Moisture/Reflow Sensitivity Classification for Nonhermetic
Solid State Surface Mount Devices.
1.2 Moisture handling ratings
Symbol
MSL
Description
Moisture sensitivity level
Min.
—
Max.
3
Unit
—
Notes
1
1. Determined according to IPC/JEDEC Standard J-STD-020,
Moisture/Reflow Sensitivity Classification for Nonhermetic
Solid State Surface Mount Devices.
1.3 ESD handling ratings
Symbol
V
HBM
V
CDM
I
LAT
Description
Electrostatic discharge voltage, human body model
Electrostatic discharge voltage, charged-device
model
Latch-up current at ambient temperature of 105°C
Min.
-2000
-500
-100
Max.
+2000
+500
+100
Unit
V
V
mA
Notes
1
2
3
1. Determined according to JEDEC Standard JESD22-A114,
Electrostatic Discharge (ESD) Sensitivity Testing Human
Body Model (HBM).
2. Determined according to JEDEC Standard JESD22-C101,
Field-Induced Charged-Device Model Test Method for
Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components.
3. Determined according to JEDEC Standard JESD78,
IC Latch-Up Test.
1.4 Voltage and current operating ratings
Kinetis K82 Sub-Family, Rev. 2, 11/2016
5
NXP Semiconductors
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