PD - 95707E
IRFB4410PbF
IRFS4410PbF
IRFSL4410PbF
Applications
l
High Efficiency Synchronous Rectification in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
G
S
HEXFET
®
Power MOSFET
D
Benefits
l
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l
Fully Characterized Capacitance and Avalanche
SOA
l
Enhanced body diode dV/dt and dI/dt Capability
l
Lead-Free
V
DSS
R
DS(on)
typ.
max.
I
D
100V
8.0m
:
10m
:
88A
S
D
G
TO-220AB
IRFB4410PbF
S
D
G
D
2
Pak
IRFS4410PbF
S
D
G
TO-262
IRFSL4410PbF
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
d
l
63
l
88
200
Max.
Units
A
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
l
1.3
l
± 20
19
380
W
W/°C
V
V/ns
°C
f
-55 to + 175
300
10lb in (1.1N m)
220
See Fig. 14, 15, 16a, 16b
x
x
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
Avalanche Current
Ã
e
mJ
A
mJ
Repetitive Avalanche Energy
g
Thermal Resistance
Symbol
R
θJC
R
θCS
R
θJA
R
θJA
Junction-to-Case
Case-to-Sink, Flat Greased Surface , TO-220
Junction-to-Ambient, TO-220
Junction-to-Ambient (PCB Mount) , D
2
Pak
k
Parameter
Typ.
–––
0.50
–––
–––
Max.
0.61
–––
62
40
l
Units
°C/W
k
jk
www.irf.com
1
05/02/07
IRFB/S/SL4410PbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Input Resistance
Min. Typ. Max. Units
100
–––
–––
2.0
–––
–––
–––
–––
–––
––– –––
0.094 –––
8.0
10
–––
4.0
–––
20
––– 250
––– 200
––– -200
1.5
–––
Conditions
V V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 1mA
mΩ V
GS
= 10V, I
D
= 58A
V V
DS
= V
GS
, I
D
= 150µA
µA V
DS
= 100V, V
GS
= 0V
V
DS
= 100V, V
GS
= 0V, T
J
= 125°C
nA V
GS
= 20V
V
GS
= -20V
Ω
f = 1MHz, open drain
g
d
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Min. Typ. Max. Units
120
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
120
31
44
24
80
55
50
5150
360
190
420
500
–––
180
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
Conditions
V
DS
= 50V, I
D
= 58A
I
D
= 58A
V
DS
= 80V
V
GS
= 10V
V
DD
= 65V
I
D
= 58A
R
G
= 4.1Ω
V
GS
= 10V
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 80V
V
GS
= 0V, V
DS
= 0V to 80V
ns
g
g
pF
h
i
, See Fig.11
h
, See Fig. 5
D
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
–––
–––
88
Conditions
MOSFET symbol
showing the
integral reverse
G
S
A
A
Ãd
380
––– –––
1.3
V
–––
38
56
ns
–––
51
77
–––
61
92
nC
T
J
= 125°C
––– 110 170
–––
2.8
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode.
T
J
= 25°C, I
S
= 58A, V
GS
= 0V
V
R
= 85V,
T
J
= 25°C
I
F
= 58A
T
J
= 125°C
di/dt = 100A/µs
T
J
= 25°C
g
g
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Package limitation current is 75A.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.14mH
R
G
= 25Ω, I
AS
= 58A, V
GS
=10V. Part not recommended for use
above this value.
I
SD
≤
58A, di/dt
≤
650A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400µs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended
footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
R
θJC
(end of life) for D
2
Pak and TO-262 = 0.75°C/W. Note: This is the maximum
measured value after 1000 temperature cycles from -55 to 150°C and is
accounted for by the physical wearout of the die attach medium.
2
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IRFB/S/SL4410PbF
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
1000
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
10
4.5V
1
4.5V
≤
60µs PULSE WIDTH
0.1
0.1
1
Tj = 25°C
10
1
100
1000
0.1
1
≤
60µs PULSE WIDTH
Tj = 175°C
10
100
1000
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
3.0
Fig 2.
Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current
(Α)
100
T J = 175°C
10
T J = 25°C
1
VDS = 25V
≤60µs
PULSE WIDTH
0.1
2
3
4
5
6
7
8
9
10
2.5
ID = 58A
VGS = 10V
2.0
1.5
1.0
0.5
-60 -40 -20 0
20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
T J , Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
100000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Fig 4.
Normalized On-Resistance vs. Temperature
12.0
ID= 58A
VGS, Gate-to-Source Voltage (V)
10.0
8.0
6.0
4.0
2.0
0.0
C, Capacitance(pF)
10000
Ciss
VDS= 80V
VDS= 50V
VDS= 20V
1000
Coss
Crss
100
1
10
VDS, Drain-to-Source Voltage (V)
100
0
20
40
60
80
100
120
QG Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFB/S/SL4410PbF
1000
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
1msec
100
T J = 175°C
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
10
T J = 25°C
10msec
10
DC
Tc = 25°C
Tj = 175°C
Single Pulse
1
0
1
10
100
1000
VGS = 0V
1
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
VSD, Source-to-Drain Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode Forward Voltage
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
Fig 8.
Maximum Safe Operating Area
130
100
Limited By Package
75
125
ID, Drain Current (A)
120
50
115
110
25
105
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
100
-60 -40 -20 0
20 40 60 80 100 120 140 160 180
T J , Temperature ( °C )
Fig 9.
Maximum Drain Current vs. Case Temperature
2.0
Fig 10.
Drain-to-Source Breakdown Voltage
900
EAS , Single Pulse Avalanche Energy (mJ)
800
700
600
500
400
300
200
100
0
1.5
ID
TOP
6.7A
9.7A
BOTTOM 58A
Energy (µJ)
1.0
0.5
0.0
0
20
40
60
80
100
120
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (°C)
4
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
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IRFB/S/SL4410PbF
1
D = 0.50
Thermal Response ( Z thJC )
0.1
0.20
0.10
0.05
0.01
0.02
0.01
τ
J
R
1
R
1
τ
J
τ
1
τ
2
R
2
R
2
τ
C
τ
Ri (°C/W)
τi
(sec)
0.2736 0.000376
0.3376
0.004143
τ
1
τ
2
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Ci=
τi/Ri
Ci i/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
100
Duty Cycle = Single Pulse
0.01
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Tj
= 150°C and
Tstart =25°C (Single Pulse)
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Τ
j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14.
Typical Avalanche Current vs.Pulsewidth
250
EAR , Avalanche Energy (mJ)
200
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 58A
150
100
50
0
25
50
75
100
125
150
175
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as neither T
jmax
nor I
av (max)
is exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
∆T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Starting T J , Junction Temperature (°C)
Fig 15.
Maximum Avalanche Energy vs. Temperature
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