FEBRUARY 2008
January 2007
AS6C2016
512K X 8 BIT
SRAM
128K X 16 BIT LOW POWER CMOS
LOW POWER CMOS SRAM
FEATURES
Fast access time : 55ns
Low power consumption:
Operating current : 20/18mA (TYP.)
Standby current : 2µA (TYP.)
Single 2.7V ~ 5.5V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data byte control : LB# (DQ0 ~ DQ7)
UB# (DQ8 ~ DQ15)
Data retention voltage : 2.0V (MIN.)
Lead free and green package available
Package : 44-pin 400 mil TSOP-II
48-ball 6mm x 8mm TFBGA
GENERAL DESCRIPTION
The AS6C2016 is a 2,097,152-bit low power
CMOS static random access memory organized as
131,072 words by 16 bits. It is fabricated using very
high performance, high reliability CMOS technology.
Its standby current is stable within the range of
operating temperature.
The AS6C2016 is well designed for low power
application, and particularly well suited for battery
back-up nonvolatile memory application.
The AS6C2016 operates from a single power
supply of 2.7V ~ 5.5V and all inputs and outputs are
fully TTL compatible
PRODUCT FAMILY
Product
Family
AS6C2016 (I)
Operating
Temperature
-40 ~ 85℃
Vcc Range
2.7 ~ 5.5V
Speed
55ns
Power Dissipation
Standby(I
SB1,
TYP.) Operating(Icc,TYP.)
2µA
20/18mA
FEBRUARY/2008, V 1.c
Alliance Memory Inc.
Page 1 of 13
FEBRUARY 2008
January 2007
AS6C2016
512K X 8 BIT
SRAM
128K X 16 BIT LOW POWER CMOS
LOW POWER CMOS SRAM
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
Vcc
Vss
DESCRIPTION
Address Inputs
Chip Enable Input
Write Enable Input
Output Enable Input
Lower Byte Control
Upper Byte Control
Power Supply
Ground
A0 - A16
CE#
WE#
OE#
LB#
UB#
V
CC
V
SS
I/O DATA
CIRCUIT
COLUMN I/O
DQ0 – DQ15 Data Inputs/Outputs
DECODER
128Kx16
MEMORY ARRAY
A0-A16
DQ0-DQ7
Lower Byte
DQ8-DQ15
Upper Byte
CE#
WE#
OE#
LB#
UB#
CONTROL
CIRCUIT
FEBRUARY/2008, V 1.c
Alliance Memory Inc.
Page 2 of 13
FEBRUARY 2008
January 2007
AS6C2016
512K X 8 BIT
SRAM
128K X 16 BIT LOW POWER CMOS
LOW POWER CMOS SRAM
PIN CONFIGURATION
A4
A3
A2
A1
A0
CE#
DQ0
DQ1
DQ2
DQ3
Vcc
Vss
DQ4
DQ5
DQ6
DQ7
WE#
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
TSOP II
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE#
UB#
LB#
DQ15
DQ14
DQ13
DQ12
Vss
Vcc
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
NC
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Voltage on V
CC
relative to V
SS
Voltage on any other pin relative to V
SS
Operating Temperature
Storage Temperature
Power Dissipation
DC Output Current
Soldering Temperature (under 10 sec)
SYMBOL
V
T1
V
T2
T
A
T
STG
P
D
I
OUT
T
SOLDER
RATING
-0.5 to 6.5
-0.5 to V
CC
+0.5
-40 to 85(I grade)
-65 to 150
1
50
260
UNIT
V
V
℃
℃
W
mA
℃
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
FEBRUARY/2008, V 1.c
AS6C2016
A
B
C
D
E
F
G
H
LB#
DQ8
OE#
UB#
A0
A3
A5
A1
A4
A6
A7
A16
A2
CE#
NC
DQ0
DQ9 DQ10
Vss
DQ1 DQ2
DQ3
DQ4
Vcc
Vss
DQ6
DQ7
NC
DQ11 NC
Vcc DQ12 NC
DQ14 DQ13 A14
DQ15
NC
NC
A8
A12
A9
A15 DQ5
A13
A10
WE#
A11
1
2
3
4
TFBGA
5
6
Alliance Memory Inc.
Page 3 of 13
FEBRUARY 2008
January 2007
AS6C2016
512K X 8 BIT
SRAM
128K X 16 BIT LOW POWER CMOS
LOW POWER CMOS SRAM
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE#
H
X
L
L
L
L
L
L
L
L
OE#
X
X
H
H
L
L
L
X
X
X
WE# LB#
X
X
H
H
H
H
H
L
L
L
X
H
L
X
L
H
L
L
H
L
UB#
X
H
X
L
H
L
L
H
L
L
I/O OPERATION
DQ0-DQ7
DQ8-DQ15
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
D
OUT
High – Z
High – Z
D
OUT
D
OUT
D
OUT
High – Z
D
IN
High – Z
D
IN
D
IN
D
IN
SUPPLY CURRENT
I
SB1
I
CC
,I
CC1
I
CC
,I
CC1
I
CC
,I
CC1
H = V
IH
, L = V
IL
, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
TEST CONDITION
SYMBOL
PARAMETER
Supply Voltage
V
CC
*1
Input High Voltage
V
IH
*2
Input Low Voltage
V
IL
>
>
Input Leakage Current
I
LI
V
CC
=
V
IN
=
V
SS
>
>
Output Leakage
V
CC
=
V
OUT
=
V
SS
,
I
LO
Current
Output Disabled
Output High Voltage
V
OH
I
OH
= -1mA
Output Low Voltage
V
OL
I
OL
= 2mA
Cycle time = Min., I
I/O
= 0mA
I
CC
CE# =0.2V,
- 55
Others at 0.2V or V
CC
-0.2V
Average Operating
Power supply Current
Cycle time = 1µs
I
CC1
CE# = 0.2V , I
I/O
= 0mA
Other pins at 0.2V or V
CC
- 0.2V
>
Standby Power
CE#
=
V
CC
- 0.2V
I
SB1
Supply Current
Others at 0.2V or V
CC
- 0.2V
Notes:
1. V
IH
(max) = V
CC
+ 3.0V for pulse width less than 10ns.
2. V
IL
(min) = V
SS
- 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
O
Typical values are measured at V
CC
= V
CC
(TYP.) and T
A
= 25
C
MIN.
2.7
2.4
- 0.2
-1
-1
2.4
-
-
-
-
TYP.
3.0
-
-
-
-
2.7
-
20
4
2
*4
MAX.
5.5
V
CC
+0.3
0.6
1
1
-
0.4
60
10
50
UNIT
V
V
V
µA
µA
V
V
mA
mA
µA
CAPACITANCE
(T
A
= 25
C
, f = 1.0MHz)
O
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
FEBRUARY/2008, V 1.c
Alliance Memory Inc.
Page 4 of 13
FEBRUARY 2008
January 2007
AS6C2016
512K X 8 BIT
SRAM
128K X 16 BIT LOW POWER CMOS
LOW POWER CMOS SRAM
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to V
CC
- 0.2V
3ns
1.5V
C
L
= 30pF + 1TTL, I
OH
/I
OL
= -2mA/4mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
LB#, UB# Access Time
LB#, UB# to High-Z Output
LB#, UB# to Low-Z Output
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
LB#, UB# Valid to End of Write
SYM.
t
RC
t
AA
t
ACE
t
OE
t
CLZ
*
t
OLZ
*
t
CHZ
*
t
OHZ
*
t
OH
t
BA
t
BHZ
*
t
BLZ
*
AS6C2016-55
MIN.
MAX.
55
-
-
55
-
55
-
30
10
-
5
-
-
20
-
20
10
-
-
55
-
25
10
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYM.
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW
*
t
WHZ
*
t
BW
AS6C2016-55
MIN.
MAX.
55
-
50
-
50
-
0
-
45
-
0
-
25
-
0
-
5
-
-
20
50
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*These parameters are guaranteed by device characterization, but not production tested.
FEBRUARY/2008, V 1.c
Alliance Memory Inc.
Page 5 of 13
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