Low Skew, 1-to-2
Differential-to-HSTL Fanout Buffer
PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES SEPTEMBER 7, 2016
85211I-01
DATASHEET
G
ENERAL
D
ESCRIPTION
T h e 85211I-01 is a low skew, high performance 1-to-2
Differential-to-HSTL Fanout Buffer The CLK, nCLK pair can
accept most standarddifferential input levels.The 85211I-01 is
characterized to operate from a 3.3V power supply. Guaranteed
output and part-to-part skew characteristics make the 85211I-01
ideal for those clock distribution applications demanding well
defined performance and repeatability. For optimal performance,
terminate all outputs.
F
EATURES
•
Two differential HSTL compatible outputs
•
One differential CLK, nCLK input pair
•
CLK, nCLK pair can accept the following differential
input levels: LVDS, LVPECL, HSTL, SSTL, HCSL
•
Maximum output frequency: 700MHz
•
Translates any single-ended input signal to HSTL
levels with resistor bias on nCLK input
•
Output skew: 30ps (maximum)
•
Part-to-part skew: 250ps (maximum)
•
Propagation delay: 1ns (maximum)
•
Output crossover Voltage: 0.68V to 0.9V
•
Output duty cycle: 49% - 51% up to 266.6MHz
•
V
OH
= 1.4V (maximum)
•
3.3V operating supply
•
-40°C to 85°C ambient operating temperature
•
Available in lead-free RoHS-compliant package
•
For functional replacement use 8523
B
LOCK
D
IAGRAM
CLK
nCLK
Q0
nQ0
Q1
nQ1
P
IN
A
SSIGNMENT
Q0
nQ0
Q1
nQ1
1
2
3
4
8
7
6
5
V
DD
CLK
nCLK
GND
85211I-01
8-Lead SOIC
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
85211I-01 REVISION B 6/12/15
1
©2015 Integrated Device Technology, Inc.
85211I-01 DATA SHEET
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 2
3, 4
5
6
7
8
Name
Q0, nQ0
Q1, nQ1
GND
nCLK
CLK
V
DD
Output
Output
Power
Input
Input
Power
Type
Description
Differential output pair. HSTL interface levels.
Differential output pair. HSTL interface levels.
Power supply ground.
Pullup/
Inverting differential clock input. V
DD
/2 default when left floating.
Pulldown
Pulldown Non-inverting differential clock input.
Positive supply pin.
NOTE:
Pullup and Pulldown
refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
T
ABLE
3. C
LOCK
I
NPUT
F
UNCTION
T
ABLE
Inputs
CLK
0
1
0
1
Biased; NOTE 1
Biased; NOTE 1
nCLK
0
1
Biased; NOTE 1
Biased; NOTE 1
0
1
Q0, Q1
LOW
HIGH
LOW
HIGH
HIGH
LOW
Outputs
nQ0, nQ1
HIGH
LOW
HIGH
LOW
LOW
HIGH
Input to Output Mode
Differential to Differential
Differential to Differential
Single Ended to Differential
Single Ended to Differential
Single Ended to Differential
Single Ended to Differential
Polarity
Non Inverting
Non Inverting
Non Inverting
Non Inverting
Inverting
Inverting
NOTE 1: Please refer to the Application Information section, “Wiring the Differential Input to Accept Single Ended Levels”.
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-HSTL FANOUT BUFFER
2
REVISION B 6/12/15
85211I-01 DATA SHEET
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
DD
Inputs, V
DD
Outputs, V
DD
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
4.6V
-0.5V to V
DD
+ 0.5 V
-0.5V to V
DD
+ 0.5V
112.7°C/W (0 lfpm)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions
beyond those listed in the
DC Characteristics
or
AC Charac-
teristics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= 3.3V ± 5%, T
A
= -40°C
TO
85°C
Symbol
V
DD
I
DD
Parameter
Power Supply Voltage
Power Supply Current
Test Conditions
Minimum
3.135
Typical
3.3
Maximum
3.465
22
Units
V
mA
T
ABLE
4B. D
IFFERENTIAL
DC C
HARACTERISTICS
,
V
DD
= 3.3V ± 5%, T
A
= -40°C
TO
85°C
Symbol
I
IH
I
IL
V
PP
V
CMR
Parameter
Input High Current
Input Low Current
nCLK
CLK
nCLK
CLK
Test Conditions
V
DD
= V
IN
= 3.465V
V
DD
= V
IN
= 3.465V
V
DD
= 3.465V, V
IN
= 0V
V
DD
= 3.465V, V
IN
= 0V
-150
-5
0.15
1.3
V
DD
- 0.85
Minimum
Typical
Maximum
150
150
Units
µA
µA
µA
µA
V
V
Peak-to-Peak Input Voltage
Common Mode Input Voltage;
0.5
NOTE 1, 2
NOTE 1: For single ended applications the maximum input voltage for CLK and nCLK is V
DD
+ 0.3V.
NOTE 2: Common mode voltage is defined as V
IH
.
T
ABLE
4C. HSTL DC C
HARACTERISTICS
,
V
DD
= 3.3V ± 5%, T
A
= -40°C
TO
85°C
Symbol
V
OH
V
OL
V
OX
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Output Crossover Voltage
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
1.0
0
0.68
0.6
1.0
Typical
Maximum
1.4
0.4
0.9
1.4
Units
V
V
V
V
NOTE 1: All outputs must be terminated with 50Ω to ground.
REVISION B 6/12/15
3
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-HSTL FANOUT BUFFER
85211I-01 DATA SHEET
T
ABLE
5. AC C
HARACTERISTICS
,
V
DD
= 3.3V ± 5%, T
A
= -40°C
TO
85°C
Symbol
f
MAX
t
PD
tsk(o)
tsk(pp)
t
R
/ t
F
odc
Parameter
Output Frequency
Propagation Delay; NOTE 1
Output Skew; NOTE 2, 4
Part-to-Part Skew; NOTE 3, 4
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
ƒ
≤
266.6MHz
200
48
49
ƒ
≤
600MHz
0.7
Test Conditions
Minimum
Typical
Maximum
700
1.0
30
250
500
52
51
Units
MHz
ns
ps
ps
ps
%
%
All parameters measured at 600MHz unless noted otherwise.
The cycle-to-cycle jitter on the input will equal the jitter on the output. The part does not add jitter.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-HSTL FANOUT BUFFER
4
REVISION B 6/12/15
85211I-01 DATA SHEET
P
ARAMETER
M
EASUREMENT
I
NFORMATION
3.3V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
D
IFFERENTIAL
I
NPUT
L
EVEL
O
UTPUT
S
KEW
P
ART
-
TO
-P
ART
S
KEW
O
UTPUT
R
ISE
/F
ALL
T
IME
P
ROPAGATION
D
ELAY
O
UTPUT
D
UTY
C
YCLE
/P
ULSE
W
IDTH
/P
ERIOD
REVISION B 6/12/15
5
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-HSTL FANOUT BUFFER
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