74ACT374
OCTAL D-TYPE FLIP-FLOP
WITH 3 STATE OUTPUTS (NON INVERTED)
s
s
s
s
s
s
s
s
s
HIGH SPEED:
f
MAX
= 260MHz (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4µA(MAX.) at T
A
=25°C
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX.)
50Ω TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 374
IMPROVED LATCH-UP IMMUNITY
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
74ACT374B
74ACT374M
DESCRIPTION
The 74ACT374 is an advanced high-speed CMOS
OCTAL D-TYPE FLIP-FLOP with 3 STATE
OUTPUT NON INVERTING fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
These 8 bit D-Type Flip-Flop are controlled by a
clock input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q
outputs will be set to the logic that were setup at
the D inputs.
While the (OE) input is low, the 8 outputs will be in
PIN CONNECTION AND IEC LOGIC SYMBOLS
O
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so
b
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a normal logic state (high or low logic level); when
the OE is high the outputs go to the high
impedance state.
The output control does not affect the internal
operation of flip-flops; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
This device is designed to interface directly High
Speed CMOS systems with TTL and NMOS
components.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
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T&R
74ACT374MTR
74ACT374TTR
April 2001
1/11
74ACT374
DC SPECIFICATIONS
Test Condition
Symbol
Parameter
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
OL
Low Level Output
Voltage
4.5
5.5
4.5
5.5
I
I
I
OZ
Input Leakage Cur-
rent
High Impedance
Output Leakege
Current
Max I
CC
/Input
Quiescent Supply
Current
Dynamic Output
Current (note 1, 2)
5.5
5.5
5.5
5.5
5.5
V
O
= 0.1 V or
V
CC
-0.1V
V
O
= 0.1 V or
V
CC
-0.1V
I
O
=-50
µA
I
O
=-50
µA
I
O
=-24 mA
I
O
=-24 mA
I
O
=50
µA
I
O
=50
µA
I
O
=24 mA
I
O
=24 mA
V
I
= V
CC
or GND
V
I
= V
IH
or V
IL
V
O
= V
CC
or GND
V
I
= V
CC
- 2.1V
V
I
= V
CC
or GND
V
OLD
= 1.65 V max
V
OHD
= 3.85 V min
0.6
4.4
5.4
3.86
4.86
0.001
0.001
0.1
0.1
0.36
0.36
±
0.1
±
0.5
T
A
= 25°C
Min.
2.0
2.0
Typ.
1.5
1.5
1.5
1.5
4.49
5.49
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
Max.
Value
-40 to 85°C
Min.
2.0
2.0
0.8
0.8
4.4
5.4
3.7
4.7
0.1
0.1
V
Max.
-55 to 125°C
Min.
2.0
2.0
0.8
0.8
V
Max.
V
Unit
V
IH
V
IL
V
OH
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
I
CCT
I
CC
I
OLD
I
OHD
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on trasmission lines with impedances as low as 50Ω
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, R
L
= 500
Ω,
Input t
r
= t
f
= 3ns)
Symbol
Parameter
b
O
t
PLH
t
PHL
Propagation Delay
Time CK to Q
t
PZL
t
PZH
Output Enable
Time
t
PLZ
t
PHZ
Output Disable
Time
t
W
CK Pulse Width
HIGH or LOW
t
s
Setup Time D to
CK, HIGH or LOW
t
h
Hold Time D to CK,
HIGH or LOW
f
MAX
Maximum CK
Frequency
so
et
l
P
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uc
d
V
CC
(V)
5.0
(*)
5.0
(*)
5.0
(*)
5.0
(*)
5.0
(*)
5.0
(*)
5.0
(*)
Test Condition
T
A
= 25°C
Min.
Typ.
5.0
6.0
6.5
1.5
0.5
-0.5
100
260
Max.
10.0
10.0
10.0
5.0
5.0
2.0
s)
t(
b
-O
so
P
te
le
4
od
r
±
5
1.5
40
75
-75
±
1
s)
t(
uc
0.5
0.5
±
1
±
5
1.6
80
50
-50
µA
µA
mA
µA
mA
mA
Value
-40 to 85°C
Min.
Max.
11.0
11.0
11.0
5.0
5.0
2.0
85
85
-55 to 125°C
Min.
Max.
11.0
11.0
11.0
5.0
5.0
2.0
ns
ns
ns
ns
ns
ns
MHz
Unit
(*) Voltage range is 5.0V
±
0.5V
4/11
74ACT374
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
5.0
5.0
5.0
f
IN
= 10MHz
T
A
= 25°C
Min.
Typ.
3
8
25
Max.
Value
-40 to 85°C
Min.
Max.
-55 to 125°C
Min.
Max.
pF
pF
pF
Unit
C
IN
C
OUT
C
PD
Input Capacitance
Output
Capacitance
Power Dissipation
Capacitance (note
1)
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/n (per circuit)
TEST CIRCUIT
TEST
t
PLH
, t
PHL
t
PZL
, t
PLZ
t
PZH
, t
PHZ
C
L
= 50pF or equivalent (includes jig and probe capacitance)
R
L
= R
1
= 500Ω or equivalent
R
T
= Z
OUT
of pulse generator (typically 50Ω)
O
so
b
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t(
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b
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SWITCH
Open
2V
CC
Open
5/11
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