IR3720
DATA SHEET
Power Monitor IC with
Digital I
2
C Interface
FEATURES
Accurate
TruePower™
monitor
•
Minimizes dynamic errors
•
Reports voltage, current, or power
Digital interface
•
SMBus and I
2
C compatible
Programmable averaging interval
Flexible current sensing
•
Resistive or Inductor DCR
Applications
•
Synchronous rectified buck converters
•
Multiphase converters
10pin 3x3 DFN lead free package
RoHS compliant
DESCRIPTION
The IR3720 measures the output voltage and inductor
current of low-voltage DC-to-DC converters and reports
the average power over a user specified time interval as
a digital word on the I
2
C. The output current is
measured across a current sensing resistor or indirectly
across the inductor’s DCR winding resistance.
Additionally, the current measurement method is also
applicable to multiphase converters.
The real time voltage and current signals are multiplied,
digitized, and averaged over a user selectable
averaging interval providing Patent Pending
TruePower™ measurement of highly dynamic loads.
TYPICAL APPLICATION CIRCUIT
Phase
Single
Phase
Converter
DCR
L
R
cs1
R
cs2
C
CS1
C
CS2
Output
Capacitors
3.3V
LOAD
VO VDD
IR3720
VCS
GND
To system
Controller
I
2
C Bus
V
REF
2
R
T
Power
Return
GND
ORDERING INFORMATION
Device
IR3720MTRPBF
* IR3720MPBF
* Samples only
Package
10 lead DFN (3x3 mm body)
10 lead DFN (3x3 mm body)
Order Quantity
3000 piece reel
121 Piece tube
Page 1 of 20
www.irf.com
09/09/08
IR3720
DATA SHEET
ABSOLUTE MAXIMUM RATINGS
All voltages referenced to GND
VDD: ................................................................3.9V
ALERT#:...........................................................3.9V
ALERT#.............................................. <VDD + 0.3V
EXTCLK ...........................................................3.9V
All other Analog and Digital pins ......................3.9V
Operating Junction Temperature .... -10°C to 150
o
C
Storage Temperature Range .......... -65
o
C to 150
o
C
Thermal Impedance (θ
JC
)............................53°C/W
ESD Rating ............HBM Class 2 JEDEC Standard
MSL Rating ..................................................Level 2
Reflow Temperature ..................................... 260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications are not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ELECTRICAL SPECIFICATIONS
PARAMETER
IC SYSTEM ACCURACY
Power accuracy,
IC only
Unless otherwise specified, these specifications apply: VDD = 3.3V ± 5%, 0
o
C
≤
T
J
≤
125
o
C, 0.5
≤
VO
≤
1.8 V, and
operation in the system accuracy test circuit. See notes following table.
TEST CONDITION
R
CS2
= 600
Ω,
R
T
= 25.5 kΩ, V
DCR
= 20 mV,
VO=1 volt, C
CS2
= 1μF
Sampling frequency 512 kHz.
Sampling interval 8 ms, 0
O
C
≤
T
J
≤
85
O
C
Notes 1, 2
MIN
TYP
MAX
3.3
UNIT
%
BIAS SUPPLY
VDD Turn-on Threshold, VDD
UP
VDD Turn-off Threshold, VDD
DN
VDD Operating Current
VDD Shutdown Current
VOLTAGE REFERENCE
V
REF
Voltage
Reference load, R
T
VOLTAGE SENSOR
Voltage error
Voltage, full scale V
FS
CURRENT SENSOR
Voltage, Current Gain, V
IG
Current range, Io x DCR
Current error
3.1
2.4
R
T
= 25.5 kΩ
Config Reg enable bit d4=1
R
T
= 25.5 kΩ
Note 1
VO=1V; V
DCR
=0 mV, 0
O
C
≤
T
J
≤
85
O
C
R
CS2
=600
Ω,
R
T
=25.5 kΩ, Note 1
1.4
20
-0.75
1.854
R
T
= 25.5 kΩ
RCS2=600
Ω
, R
T
=25.5 kΩ
VO=1V; V
DCR
=20 mV, 0
O
C
≤
T
J
≤
85
O
C
RCS2=600
Ω,
R
T
=25.5 KΩ, Note 1
1.5
-35
-2.4
35
2.4
480
17
1.5
25.5
660
100
1.6
40
0.75
V
V
μA
μA
V
kΩ
%
V
V
mV
%
Page 2 of 20
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09/09/08
IR3720
DATA SHEET
PARAMETER
DIGITIZER
Internal Sampling frequency
External Sampling frequency
Transition time
POWER INFORMATION
Minimum Averaging Interval
Maximum Averaging Interval
Output Register
Measuring power
Output Register
Measuring power
Output Register
Measuring power
Output Register
Measuring power
Full Scale Output Register
Measuring power
DIGITAL INPUT AND OUTPUT
ALERT# pull down resistance
SDA & SCL HIGH Level
SDA & SCL Low Level
SCL Input current
SDA pull down voltage
TIMING
Maximum Frequency
Bus free time between stop and
start T
BUF
Hold time after (repeated) start
condition T
HD:STA
Repeated start condition setup
time T
SU:STA
Stop condition setup time T
SU:STO
Data hold time T
HD:DAT
Data setup time T
SU:DAT
Clock low period T
LOW
Clock high period T
HIGH
Clock or data fall time T
F
Clock or data rise time T
R
TEST CONDITION
Driven from internal clock
Driven from external clock
Driven from external clock Note 1
Config Reg [d3..d0] = b‘0000, Note 1
Config Reg [d3..d0] = b‘1000, Note 1
VO=1V; V
DCR
=20 mV
R
CS2
=600
Ω
, R
T
=25.5 kΩ, Note 1,2
VO=0.5V; V
DCR
=20 mV
R
CS2
=600
Ω,
R
T
=25.5 kΩ, Note 1,2
VO=1V; V
DCR
=0 mV
R
CS2
=600
Ω,
R
T
=25.5 kΩ, Note 1,2
VO=1V; V
DCR
=-8 mV
R
CS2
=600
Ω,
R
T
=25.5 kΩ, Note 1,2
VO = 1.8; V
DCR
=35 mV
R
CS2
=600
Ω,
R
T
=25.5 kΩ, Note 1,2
Sink 3 mA
Note 1
Note 1
Note 1
Sink 4 mA Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
0.9
230
1380
0980
FF40
F740
3DC0
1
256
1440
0A00
0000
F800
3F80
MIN
435
922
TYP
512
1024
MAX
589
1126
50
1.1
282
1500
0A80
00C0
F8C0
4000
UNIT
kHz
kHz
ns
ms
ms
HEX
HEX
HEX
HEX
HEX
250
2.1
-5
0.8
+5
0.4
400
Ω
V
V
uA
V
kHz
us
us
us
us
ns
ns
us
us
ns
ns
10
1.3
0.6
0.6
0.6
300
100
1.3
0.6
20
20
300
300
NOTE:
1.
Guaranteed by design, not tested in production
2.
Average of eight data samples
Page 3 of 20
www.irf.com
09/09/08
IR3720
DATA SHEET
SYSTEM ACCURACY TEST CIRCUIT
V
DCR
VDD
R
CS2
C
CS2
VDD
VDD
Bypass
Cap
R
T
GND
VREF
VCS
VO
ALERT#
EXTCLK
ADDR
SDA
SCL
VO
Page 4 of 20
www.irf.com
09/09/08
IR3720
DATA SHEET
BLOCK DIAGRAM
IC PIN DESCRIPTION
NAME
VCS
VO
VREF
GND
VDD
EXTCLK
ADDR
SCL
SDA
ALERT#
BASE PAD
NUMBER
1
2
3
4
5
6
7
8
9
10
I/O LEVEL
Analog
Analog
Analog
3.3V
3.3V Digital
3.3V Digital
3.3V Digital
3.3V Digital
3.3V Digital
DESCRIPTION
Current sensing input
Voltage sensing input
Thermistor sensing input
IC bias supply and signal ground
3.3V bias supply
Input for optional external clock
I
2
C Address selection input; See Table 1 for address
I
2
C Clock; Input only
I
2
C Data; Input / Open drain output
Programmable output function; Open drain output clamped to VDD
Connect to pin 4
Page 5 of 20
www.irf.com
09/09/08
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