*Total Shunt Capacitance of Test Jig and Connectors
For PNP Test Circuits, Reverse All Voltage Polarities
R
B
* C
S
t
6.0 pF
100
R
L
OUTPUT
V
in
5.0
mF
TURN-OFF TIME
+V
BB
V
CC
+40 V
100
R
B
* C
S
t
6.0 pF
100
R
L
OUTPUT
Figure 1. Switching Time Test Circuits
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2
MMBTA56W, SMMBTA56W
f T , CURRENT-GAIN - BANDWIDTH PRODUCT (MHz
200
V
CE
= -2.0 V
T
J
= 25°C
C, CAPACITANCE (pF)
100
70
50
100
70
50
30
20
C
ibo
T
J
= 25°C
10
7.0
30
20
-2.0 -3.0
5.0
-0.1 -0.2
C
obo
-5.0 -7.0 -10
-20 -30
-50 -70 -100
-200
-0.5 -1.0 -2.0
-5.0
-10
-20
-50 -100
I
C
, COLLECTOR CURRENT (mA)
V
R
, REVERSE VOLTAGE (VOLTS)
Figure 2. Current−Gain — Bandwidth Product
Figure 3. Capacitance
300
t, TIME (ns)
200
100
70
50
30
20
V
CC
= -40 V
I
C
/I
B
= 10
I
B1
= I
B2
T
J
= 25°C
t
s
I C , COLLECTOR CURRENT (mA)
1.0 k
700
500
-1.0 k
-700
-500
-300
-200
T
A
= 25°C
-100
-70
-50
-30
-20
-10
T
C
= 25°C
1.0 s
100
ms
1.0 ms
t
f
CURRENT LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
t
d
@ V
BE(off)
= -0.5 V
-20 -30
-50 -70 -100
t
r
-200 -300
-500
-1.0
-2.0 -3.0
-5.0 -7.0 -10
-20 -30
-50 -70 -100
10
-5.0 -7.0 -10
I
C
, COLLECTOR CURRENT (mA)
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 4. Switching Time
Figure 5. Active−Region Safe Operating Area
400
T
J
= 125°C
V
CE
= -1.0 V
h FE , DC CURRENT GAIN
25°C
-55°C
100
80
60
40
-0.5 -1.0 -2.0
V, VOLTAGE (VOLTS)
200
-1.0
T
J
= 25°C
V
BE(sat)
@ I
C
/I
B
= 10
-0.8
-0.6
V
BE(on)
@ V
CE
= -1.0 V
-0.4
-0.2
V
CE(sat)
@ I
C
/I
B
= 10
-5.0 -10
-20
-50
-100 -200
-500
0
-0.5
-1.0 -2.0
-5.0
-10
-20
-50
-100 -200
-500
I
C
, COLLECTOR CURRENT (mA)
I
C
, COLLECTOR CURRENT (mA)
Figure 6. DC Current Gain
Figure 7. “ON” Voltages
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3
MMBTA56W, SMMBTA56W
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
T
J
= 25°C
-0.8
I
C
=
-50 mA
-0.6
I
C
=
-100 mA
I
C
=
-250 mA
I
C
=
-500 mA
R
q
VB , TEMPERATURE COEFFICIENT (mV/
°
C)
-1.0
-0.8
-1.2
-1.6
R
qVB
for V
BE
-0.4
I
C
=
-10 mA
-2.0
-0.2
-2.4
-2.8
-0.5 -1.0 -2.0
0
-0.05 -0.1 -0.2
-0.5
-1.0
-2.0
-5.0
-10
-20
-50
-5.0
-10
-20
-50
-100 -200
-500
I
B
, BASE CURRENT (mA)
I
C
, COLLECTOR CURRENT (mA)
Figure 8. Collector Saturation Region
Figure 9. Base−Emitter Temperature
Coefficient
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4
MMBTA56W, SMMBTA56W
PACKAGE DIMENSIONS
SC−70 (SOT−323)
CASE 419−04
ISSUE N
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM
A
A1
A2
b
c
D
E
e
e1
L
H
E
MIN
0.80
0.00
0.30
0.10
1.80
1.15
1.20
0.20
2.00
MILLIMETERS
NOM
MAX
0.90
1.00
0.05
0.10
0.70 REF
0.35
0.40
0.18
0.25
2.10
2.20
1.24
1.35
1.30
1.40
0.65 BSC
0.38
0.56
2.10
2.40
MIN
0.032
0.000
0.012
0.004
0.071
0.045
0.047
0.008
0.079
INCHES
NOM
0.035
0.002
0.028 REF
0.014
0.007
0.083
0.049
0.051
0.026 BSC
0.015
0.083
MAX
0.040
0.004
0.016
0.010
0.087
0.053
0.055
0.022
0.095
e1
3
H
E
1
2
E
b
e
A
0.05 (0.002)
A1
A2
L
c
STYLE 3:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
SOLDERING FOOTPRINT*
0.65
0.025
0.65
0.025
1.9
0.075
0.9
0.035
0.7
0.028
SCALE 10:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor
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