NDBA100N10B
Power MOSFET
100V, 6.9m
Ω
, 100A, N-Channel
Features
•
Low On-Resistance
•
Low Gate Charge
•
High Speed Switching
•
100% Avalanche Tested
•
Pb-Free, Halogen Free and RoHS Compliance
VDSS
100V
RDS(on) Max
6.9 mΩ@15V
8.2 mΩ@10V
ID Max
100A
www.onsemi.com
Specifications
Absolute Maximum Ratings
at Ta = 25°C
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current (DC)
Drain Current (Pulse)
PW≤10μs, duty cycle≤1%
Power Dissipation
Tc=25°C
Junction Temperature
Storage Temperature
Source Current (Body Diode)
Avalanche Energy (Single Pulse) *
Lead Temperature for Soldering
Purposes, 3mm from Case for 10 Seconds
1
Electrical Connection
N-Channel
2, 4
Value
100
±20
100
400
110
175
−55
to +175
100
147
260
Unit
V
V
A
A
W
°C
°C
A
mJ
°C
Symbol
VDSS
VGSS
ID
IDP
PD
Tj
Tstg
IS
EAS
TL
1
1 : Gate
2 : Drain
3 : Source
4 : Drain
3
Marking
4
100N10
1
2
3
B
LOT No.
TO-263
CASE 418AJ
Packing Type : TL
Thermal Resistance Ratings
Parameter
Junction to Case Steady State
Junction to Ambient *
2
Note : *
1
VDD=48V, L=100μH, IAV=40A (Fig.1)
*
2
Surface mounted on FR4 board using recommended footprint
Symbol
R
θJC
R
θJA
Value
1.36
62.5
Unit
°C/W
TL
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2015
March 2015 - Rev. 1
1
Publication Order Number :
NDBA100N10B/D
NDBA100N10B
Electrical Characteristics
at Ta = 25°C
Parameter
Drain to Source Breakdown Voltage
Zero-Gate Voltage Drain Current
Gate to Source Leakage Current
Gate Threshold Voltage
Forward Transconductance
Static Drain to Source On-State Resistance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-ON Delay Time
Rise Time
Turn-OFF Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Forward Diode Voltage
Reverse Recovery Time
Reverse Recovery Charge
Symbol
V(BR)DSS
IDSS
IGSS
VGS(th)
gFS
RDS(on)1
RDS(on)2
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
VSD
trr
Qrr
IS=100A, VGS=0V
See Fig.3
IS=100A, VGS=0V, VDD=50V, di/dt=100A/μs
VDS=48V, VGS=10V, ID=100A
See Fig.2
VDS=50V, f=1MHz
Conditions
ID=10mA, VGS=0V
VDS=100V, VGS=0V
VGS=±20V, VDS=0V
VDS=10V, ID=1mA
VDS=10V, ID=50A
ID=50A, VGS=15V
ID=50A, VGS=10V
2
75
5.7
6.3
2,950
1,250
20
40
385
68
52
35
13
10
1.1
130
400
1.5
6.9
8.2
Value
min
100
10
±100
4
typ
max
Unit
V
μA
nA
V
S
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
Fig.1 Unclamped Inductive Switching Test Circuit
D
≥50Ω
L
Fig.2 Switching Time Test Circuit
G
S
NDBA100N10B
VDD
10V
0V
50Ω
Fig.3 Reverse Recovery Time Test Circuit
D
NDBA100N10B
G
L
S
VDD
Driver MOSFET
www.onsemi.com
2
NDBA100N10B
Package Dimensions
NDBA100N10BT4H
D
2
PAK-3 (TO-263, 3-LEAD)
CASE 418AJ
ISSUE B
B
E
E2
A
NOTE 3
SEATING
PLANE
A
c2
A
L1
L1
D
H
DETAIL C
D1
E1
0.10
L2
e
A
c
2X
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. CHAMFER OPTIONAL
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH. MOLD FLASH SHALL NOT EXCEED 0.005
PER SIDE. THESE DIMENSIONS ARE MEASURED
AT THE OUTERMOST EXTREMES OF THE
PLASTIC BODY AT DATUM H.
5. THERMAL PAD CONTOUR IS OPTIONAL WITHIN
DIMENSIONS E, L1, D1 AND E1.
6. OPTIONAL MOLD FEATURE
B A
M
DIM
A
A1
b
c
c2
D
D1
E
E1
e
H
L
L1
L2
L3
M
NOTE 6
VIEW A-A
H
TOP VIEW
b
0.10
SIDE VIEW
M
B A
M
GAUGE
PLANE
L3
L
M
DETAIL C
A1
B
SEATING
PLANE
INCHES
MIN
MAX
0.160
0.190
0.000
0.010
0.020
0.039
0.012
0.029
0.045
0.065
0.330
0.380
0.260
-----
0.380
0.420
0.245
-----
0.100 BSC
0.575
0.625
0.070
0.110
-----
0.066
-----
0.070
0.010 BSC
0º
8º
MILLIMETERS
MIN
MAX
4.06
4.83
0.00
0.25
0.51
0.99
0.30
0.74
1.14
1.65
8.38
9.65
6.60
-----
9.65
10.67
6.22
-----
2.54 BSC
14.60
15.88
1.78
2.79
-----
1.68
-----
1.78
0.25 BSC
0º
8º
VIEW A-A
OPTIONAL CONSTRUCTIONS
GENERIC MARKING DIAGRAMS*
RECOMMENDED
SOLDERING FOOTPRINT*
0.436
XX
XXXXXXXXX
AWLYWWG
XXXXXXXXG
AYWW
AYWW
XXXXXXXXG
AKA
XXXXXX
XXYMW
0.366
0.653
A
WL
Y
WW
W
M
G
AKA
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Week Code (SSG)
= Month Code (SSG)
= Pb-Free Package
= Polarity Indicator
2X
0.169
2X
0.063
0.100
PITCH
DIMENSIONS: INCHES
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb −Free indicator, “G” or microdot “ ”,
may or may not be present.
ORDERING INFORMATION
Device
NDBA100N10BT4H
Package
D PAK-3
(TO-263, 3-LEAD)
2
Shipping
800 pcs. / Tape & Reel
note
Pb-Free and Halogen Free
† For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel
Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF
Note on usage : Since the NDBA100N10B is a MOSFET product, please avoid using this device in the vicinity
of highly charged objects.
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of
SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf . SCILLC reserves the right to make changes without
further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose,
nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including
without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can
and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are
not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or
sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers,
employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of,
directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was
negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all
applicable copyright laws and is not for resale in any manner.
www.onsemi.com
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
