NSS40601CF8T1G
40 V, 8.0 A, Low V
CE(sat)
NPN Transistor
ON Semiconductor's e
2
PowerEdge family of low V
CE(sat)
transistors are miniature surface mount devices featuring ultra low
saturation voltage (V
CE(sat)
) and high current gain capability. These
are designed for use in low voltage, high speed switching applications
where affordable efficient energy control is important.
Typical applications are DC-DC converters and power management
in portable and battery powered products such as cellular and cordless
phones, PDAs, computers, printers, digital cameras and MP3 players.
Other applications are low voltage motor controls in mass storage
products such as disc drives and tape drives. In the automotive
industry they can be used in air bag deployment and in the instrument
cluster. The high current gain allows e
2
PowerEdge devices to be
driven directly from PMU's control outputs, and the Linear Gain
(Beta) makes them ideal components in analog amplifiers.
•
This is a Pb-Free Device
MAXIMUM RATINGS
(T
A
= 25°C)
Rating
Collector‐Emitter Voltage
Collector‐Base Voltage
Emitter‐Base Voltage
Collector Current - Continuous
Collector Current - Peak
Electrostatic Discharge
Symbol
V
CEO
V
CBO
V
EBO
I
C
I
CM
ESD
Max
40
40
6.0
6.0
8.0
Unit
Vdc
Vdc
Vdc
Adc
A
1
8
ChipFET]
CASE 1206A
STYLE 4
5
EMITTER
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40 VOLTS, 8.0 AMPS
NPN LOW V
CE(sat)
TRANSISTOR
EQUIVALENT R
DS(on)
31 mW
COLLECTOR
1, 2, 3, 6, 7, 8
4
BASE
HBM Class 3B
MM Class C
MARKING DIAGRAM
VB M
G
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation, T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction-to-Ambient
Total Device Dissipation, T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction-to-Ambient
Thermal Resistance,
Junction-to-Lead #1
Junction and Storage
Temperature Range
Symbol
P
D
(Note 1)
R
qJA
(Note 1)
P
D
(Note 2)
R
qJA
(Note 2)
R
qJL
(Note 2)
T
J
, T
stg
Max
830
6.7
150
1.4
11.1
90
15
-55 to
+150
Unit
mW
mW/°C
°C/W
W
mW/°C
°C/W
°C/W
°C
VB = Specific Device Code
M = Month Code
G
= Pb-Free Package
PIN CONNECTIONS
C 8
C 7
C 6
E 5
1 C
2 C
3 C
4 B
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR-4 @ 100 mm
2
, 1 oz copper traces.
2. FR-4 @ 500 mm
2
, 1 oz copper traces.
ORDERING INFORMATION
Device
NSS40601CF8T1G
Package
ChipFET
(Pb-Free)
Shipping
†
3000/
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2007
1
May, 2007 - Rev. 1
Publication Order Number:
NSS40601CF8/D
NSS40601CF8T1G
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Collector-Emitter Breakdown Voltage
(I
C
= 10 mAdc, I
B
= 0)
Collector-Base Breakdown Voltage
(I
C
= 0.1 mAdc, I
E
= 0)
Emitter-Base Breakdown Voltage
(I
E
= 0.1 mAdc, I
C
= 0)
Collector Cutoff Current
(V
CB
= 40 Vdc, I
E
= 0)
Emitter Cutoff Current
(V
EB
= 6.0 Vdc)
ON CHARACTERISTICS
DC Current Gain (Note 3)
(I
C
= 10 mA, V
CE
= 2.0 V)
(I
C
= 500 mA, V
CE
= 2.0 V)
(I
C
= 1.0 A, V
CE
= 2.0 V)
(I
C
= 2.0 A, V
CE
= 2.0 V)
(I
C
= 3.0 A, V
CE
= 2.0 V)
Collector-Emitter Saturation Voltage (Note 3)
(I
C
= 0.1 A, I
B
= 0.010 A)
(I
C
= 1.0 A, I
B
= 0.100 A)
(I
C
= 1.0 A, I
B
= 0.010 A)
(I
C
= 2.0 A, I
B
= 0.020 A)
(I
C
= 3.0 A, I
B
= 0.030 A)
(I
C
= 4.0 A, I
B
= 0.400 A)
Base-Emitter Saturation Voltage (Note 3)
(I
C
= 1.0 A, I
B
= 0.01 A)
Base-Emitter Turn-on Voltage (Note 3)
(I
C
= 2.0 A, V
CE
= 2.0 V)
Cutoff Frequency
(I
C
= 100 mA, V
CE
= 5.0 V, f = 100 MHz)
Input Capacitance (V
EB
= 0.5 V, f = 1.0 MHz)
Output Capacitance (V
CB
= 3.0 V, f = 1.0 MHz)
SWITCHING CHARACTERISTICS
Delay (V
CC
= 30 V, I
C
= 750 mA, I
B1
= 15 mA)
Rise (V
CC
= 30 V, I
C
= 750 mA, I
B1
= 15 mA)
Storage (V
CC
= 30 V, I
C
= 750 mA, I
B1
= 15 mA)
Fall (V
CC
= 30 V, I
C
= 750 mA, I
B1
= 15 mA)
3. Pulsed Condition: Pulse Width = 300
msec,
Duty Cycle
≤
2%.
t
d
t
r
t
s
t
f
-
-
-
-
-
-
-
-
110
130
1400
130
ns
ns
ns
ns
h
FE
200
200
200
200
200
V
CE(sat)
-
-
-
-
-
-
V
BE(sat)
-
V
BE(on)
-
f
T
140
Cibo
Cobo
-
-
-
-
-
-
1200
100
pF
pF
0.720
0.900
MHz
0.760
0.900
V
0.008
0.031
0.060
0.075
0.100
0.090
0.010
0.075
0.075
0.110
0.150
0.135
V
-
-
395
-
-
-
-
-
-
-
V
V
(BR)CEO
40
V
(BR)CBO
40
V
(BR)EBO
6.0
I
CBO
-
I
EBO
-
-
0.1
-
0.1
mAdc
-
-
mAdc
-
-
Vdc
-
-
Vdc
Vdc
Symbol
Min
Typical
Max
Unit
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2
NSS40601CF8T1G
0.25
V
CE(sat)
, COLLECTOR EMITTER
SATURATION VOLTAGE (V)
V
CE(sat)
, COLLECTOR EMITTER
SATURATION VOLTAGE (V)
I
C
/I
B
= 10
0.2
V
CE(sat)
= 150°C
0.45
0.4
0.35
0.3
0.25
0.2
0.15
0.1
0.05
0
0.001
0.01
0.1
1
10
25°C
-55
°C
I
C
/I
B
= 100
V
CE(sat)
= 150°C
0.15
0.1
25°C
0.05
-55
°C
0
0.001
0.01
0.1
1
10
I
C
, COLLECTOR CURRENT (A)
I
C
, COLLECTOR CURRENT (A)
Figure 1. Collector Emitter Saturation Voltage
vs. Collector Current
700
650
h
FE
, DC CURRENT GAIN
600
550
500
450
400
350
300
250
200
150
0.001
0.01
0.1
-55
°C
(5 V)
-55
°C
(2 V)
1
10
25°C (5 V)
25°C (2 V)
150°C (2 V)
150°C (5 V)
V
BE(sat)
, BASE EMITTER
SATURATION VOLTAGE (V)
1.20
1.00
0.80
0.60
0.40
0.20
Figure 2. Collector Emitter Saturation Voltage
vs. Collector Current
I
C
/I
B
= 10
-55
°C
25°C
150°C
0.001
0.01
0.1
1
10
I
C
, COLLECTOR CURRENT (A)
I
C
, COLLECTOR CURRENT (A)
V
BE(on)
, BASE EMITTER TURN-ON VOLTAGE (V)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.001
0.01
0.1
1
10
150°C
V
CE
= 2.0 V
-55
°C
25°C
V
CE
, COLLECTOR-EMITTER VOLTAGE (V)
Figure 3. DC Current Gain vs.
Collector Current
Figure 4. Base Emitter Saturation Voltage vs.
Collector Current
1.0
100 mA
0.8
10 mA
300 mA
0.6
I
C
= 500 mA
0.4
0.2
0.0
0.01
0.1
1
10
100
I
C
, COLLECTOR CURRENT (A)
I
B
, BASE CURRENT (mA)
Figure 5. Base Emitter Turn-On Voltage vs.
Collector Current
Figure 6. Saturation Region
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3
NSS40601CF8T1G
1050
C
ibo
, INPUT CAPACITANCE (pF)
C
ibo
(pF)
950
850
750
650
550
450
0
1
2
3
4
5
6
V
EB
, EMITTER BASE VOLTAGE (V)
C
obo
, OUTPUT CAPACITANCE (pF)
200
C
obo
(pF)
175
150
125
100
75
50
25
0
5
10
15
20
25
30
35
V
CB
, COLLECTOR BASE VOLTAGE (V)
Figure 7. Input Capacitance
Figure 8. Output Capacitance
10
1.0 S
100 mS
1.0 mS
10 mS
1.0
I
C
(A)
Thermal Limit
0.1
Single Pulse Test
at T
amb
= 25°C
0.01
0.01
0.1
1.0
V
CE
(V
dc
)
10
100
Figure 9. Safe Operating Area
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4
NSS40601CF8T1G
PACKAGE DIMENSIONS
D
8
7
6
5
q
L
ChipFETt
CASE 1206A-03
ISSUE H
5
6
3
7
2
8
1
H
E
1
2
3
4
E
4
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
DIM
A
b
c
D
E
e
e1
L
H
E
q
MIN
1.00
0.25
0.10
2.95
1.55
MILLIMETERS
NOM
MAX
1.05
1.10
0.30
0.35
0.15
0.20
3.05
3.10
1.65
1.70
0.65 BSC
0.55 BSC
0.28
0.35
0.42
1.80
1.90
2.00
5° NOM
MIN
0.039
0.010
0.004
0.116
0.061
INCHES
NOM
0.041
0.012
0.006
0.120
0.065
0.025 BSC
0.022 BSC
0.011
0.014
0.071
0.075
5° NOM
MAX
0.043
0.014
0.008
0.122
0.067
e1
e
b
c
A
0.05 (0.002)
0.017
0.079
STYLE 4:
PIN 1. COLLECTOR
2. COLLECTOR
3. COLLECTOR
4. BASE
5. EMITTER
6. COLLECTOR
7. COLLECTOR
8. COLLECTOR
SOLDERING FOOTPRINT*
2.032
0.08
2.032
0.08
1
1
1.727
0.068
2.362
0.093
0.635
0.025
PITCH
2.362
0.093
8X
8X
0.457
0.018
0.66
0.026
2X
2X
mm
inches
0.457
0.018
0.66
0.026
mm
inches
Basic Style
Styles 1 and 4
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
Microchip MCU
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