TX-IF SiMMIC FOR W-CDMA
AGC + I/Q MODULATOR
FEATURES
• TX-IF:
380 MHz
• LOW POWER CONSUMPTION:
V
CC
= 3.0 V
• SMALL 20 PIN QFN PACKAGE:
Flat lead style for better performance
• TAPE AND REEL PACKAGING AVAILABLE
UPC8195K
BLOCK DIAGRAM
15
14
13
12
11
16
17
LPF
18
19
20
Reg. &
AGC CTRL
10
9
8
7
6
Freq.1/2
+ Phase
Shifter
DESCRIPTION
1
2
3
4
5
NEC's UPC8195K is a Silicon Microwave Monolithic Inte-
grated Circuit designed as a transmitter/TX section for W-
CDMA. The UPC8195K is a TX-IF IC including IF-AGC
amplifier and modulator. This IC is suitable for kit-use for W-
CDMA IF section.
This IC was developed using NEC's new ultra high seed
silicon bipolar process.
NEC's stringent quality assurance and test procedures en-
sure the highest reliability and perormance.
APPLICATIONS
• W-CDMA
ELECTRICAL CHARACTERISTICS
(unless otherwise specified,T
A
= 25°C, V
CC
= 3.0 V, fIF = 380 MHz, fLO = 760 MHz,
PLO = -15 dBm, fI/Q =10 kHz, 400 mVp-p balanced sine-wave)
PART NUMBER
PACKAGE OUTLINE
SYMBOLS
I
CC
P
OUT
LoL
I
mR
T
PS(Rise)
V
PS(Rise)
V
PS(fall)
PARAMETERS AND CONDITIONS
Circuit Current, no input signals
At power saving mode
Output Power, V
CONT
= 2.3 V, I/Q = 400mVp-p balanced
V
CONT
= 0.3 V, I/Q = 400mVp-p balanced
Local Leakage, V
CONT
= 2.3 V, I/Q = 400mVp-p balanced
Image Rejection, V
CONT
= 2.3 V, I/Q = 400mVp-p balanced
Rise time from power-saving mode
Rising voltage from power-saving mode
Falling voltage from power-saving mode
UNITS
mA
µA
dBm
dBc
dBc
us
V
V
MIN
–
–
-17
–
–
–
–
2.2
–
UP8195K
QFN-20
TYP
25.5
–
-13
-88
–
–
–
–
–
MAX
30
1
–
-83
-30
-30
10
–
0.5
California Eastern Laboratories
UPC8195K
STANDARD CHARACTERISTICS FOR REFERENCE
(unless otherwise specified,T
A
= 25°C, V
CC
= 3.0 V,
fIF = 380 MHz, fLO = 760 MHz, PLO = -15 dBm, fI/Q =10 kHz, 400 mVp-p balanced sine-wave)
PART NUMBER
PACKAGE OUTLINE
SYMBOLS
NF
L1
NF
L2
GF
EVM
ACPR
PARAMETERS AND CONDITIONS
Output Noise Level 1, Pout = -25 dBm, fIF±20MHz
Output Noise Level 2, Pout = -65 dBm, fIF±20MHz
Gain Flatness, fIF±2.5MHz
Error Vector Magnitude, I/Q = 3.84 Msps QPSK
Adjacent Channel Power Ratio,
fIF±5 MHz, I/Q=3.84 Msps QPSK
UNITS
dBm/Hz
dBm/Hz
dB
%rms
dBc
MIN
–
–
–
–
–
UP8195K
QFN-20
TYP
-147
-160
–
3
-55
MAX
–
–
0.25
–
–
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25°C)
SYMBOLS
V
CC
V
PS,
V
CONT
T
A
T
STG
P
D
PARAMETERS
Supply Voltage
Applied Voltage
Ope rating Ambient
Temperature
Storage Temperature
Power Dissipation
UNITS
V
V
°C
°C
mW
RATINGS
4.0
-0.3 to V
CC
+0.3
-40 to +85
RECOMMENDED
OPERATING CONDITIONS
SYMBOLS
V
CC
T
A
f
IF
PARAMETERS
Supply Voltage
Operating Ambient
Temperature
IF Frequency
Local Frequency
Local input Level
IF output impedance,
Balanced output internal
resistance
I/Q Maximum Input
Voltage
UNITS MIN
V
°C
MHz
MHz
dBm
kΩ
2.7
-25
–
–
-18
–
TYP
3.0
+25
380
760
-15
1
MAX
3.3
+85
–
–
-12
–
-55 to +150
309
f
LO
P
LO
ZIF
Notes:
1. Operation in excess of any one of these parameters may result
in permanent damage.
VI/Q
V
–
0.4
1
ORDERING INFORMATION
Part Number
UPC8195K-E1-A
Package
20 Pin plastic QFN
TYPICAL PERFORMANCE CURVES
(T
A
= 25°C)
Output Power CHpwr (dBm)
Adjacent Channel Power ACPup, ACPlow (dBc)
OUTPUT POWER,
ADJACENT CHANNEL POWER vs.
AGC CONTROL VOLTAGE
0
-130
OUTPUT NOISE LEVEL vs.
OUTPUT POWER
25°C
Output Noise Level NFL (dBm/Hz)
-10
-20
-30
-40
-50
-60
-70
CHpwr (25°C)
ACPup (25°C)
ACPlow (25°C)
CHpwr
-135
-140
-145
-150
-155
-160
-165
-170
-100
ACP
-80
-90
-100
0
0.5
1
1.5
2
2.5
3
-80
-60
-40
-20
0
AGC Control Voltage Vcont (V)
Output Power Pout (dBm)
UPC8195K
MEASUEMENT CIRCUIT
(Units in mm)
V
CC
V
CC
1
µ
F
1
µ
F
V
CC
1
µ
F
9 pF
39 nH
IFout
180 nH
REG. and
AGC_Control
1
µ
F
1
µ
F
1
µ
F
LPF
1nF
Phase
Shifter
(1/2)
LO
in
1nF
V
cont
V
PS
V
CC
TOKO
Type B4F
617DB-1024
1
µ
F
180 nH
V
CC
I
Ib
1 nF
1 nF
1 nF 1 nF
Qb
Q
Remarks 1.
: AC connector
: DC terminal
2.
In the case of ACPR, output noise level, EVM measurement, 1 nF capacitors
of I, Ib, Q, Qb are removed.
BLOCK DIAGRAM
(Units in mm)
V
CC
(AGC,MIX)
GND
(AGC,MIX)
GND
(AGC,MIX)
GND
(REG)
15
14
13
12
V
CC
(Reg)
11
IF out
IF outb
GND
(AGC,MIX)
I
Ib
16
17
18
19
20
LPF
Reg. &
AGC CTRL
10
9
8
7
6
V
CONT
Vps
V
CC
(Shifter)
Lo
Lob
freq. 1/2
+ phase
shifter
1
Qb
2
Q
3
GND
(Shifter)
4
NC
5
NC
PASSW
• UPC8191K: Mix = two pieces of Divide-by-2 F/F phase shifter (=3/4). Pin 4, 5 are for exteranl Tank circuit.
• UPC8195K: Only one piece of Divide-by-2 F/F phase shifter (=1/2). Pin 4, 5 are non -connection.
UPC8195K
PIN FUNCTIONS
(Pin Voltage is measured at V
CC
= 2.85 V)
Pin
No.
1
Pin
Name
Qb
Applied
Voltage
(V)
V
CC
/2
Pin
Voltage
(V)
-
Functions and Applications
Internal Equivalent Circuits
Q signal input pin.
Apply bias voltage externally.
Maximum balance input voltage is
1 000 mV
p-p
(balance).
2
Q
V
CC
/2
-
1
2
3
GND
(Shifter)
0
-
Ground pin of I/Q modulator.
This pin should be grounded with
minimum inductance.
Form the ground pattern as widely as
possible to minimize ground impedance.
–
4
5
N.C.
0
-
No connection
–
This pin is not connected to internal circuit
This pin should be opened or grounded.
6
LOb
0
2.02
Bypass pin of local signal input for I/Q
modulator.
In the case of single local input,
this pin must be decoupled with capacitor
ex. 1 000 pF.
–
7
LO
0
2.02
Local signal input of I/Q modulator.
The DC cut capacitor ex. 1 000 pF
must be attaced to this pin.
Supply voltage pin of I/Q modulator.
–
–
8
V
CC
2.7 to 3.3
(Shifter)
V
PS
0 to 3.0
-
9
-
Power saving pin of I/Q modulator +
AGC amplifier.
This pin modulator can control
Active/Sleep state with bias as follows.
9
50 kΩ
V
PS
(V)
0 to 0.5
2.2 to 3
State
Sleep Mode
Active Mode
UPC8195K
PIN FUNCTIONS
(Pin Voltage is measured at V
CC
= 2.85 V)
Pin
No.
10
Pin
Name
Vcont
Applied
Voltage
(V)
0 to 3.0
Pin
Voltage
(V)
-
Functions and Applications
Internal Equivalent Circuits
Gain control pin of AGC amplifier.
Variable gains are available in
accordance with applied voltage
between 0 to 3.0 V.
10.5 kΩ
2.5 kΩ
11
V
CC
(REG.)
GND
(REG.)
2.7 to 3.3
-
Supply voltage pin of internal regulator.
–
12
0
-
Ground pin internal regulator.
This pin should be grounded with
minimum inductance.
Form the ground pattern as widely
as possible to minimize ground impedance.
–
13
14
18
GND
(AGC,
MIX)
0
-
Ground pin of AGC amplifier + I/Q Mixer.
This pin should be grounded with
minimum inductance.
Form the ground pattern as widely
as possible to minimize ground impedance.
–
15
V
CC
(AGC
, MIX)
2.7 to 3.3
-
Supply voltage pin of AGC amplifier +
I/Q Mixer.
–
16
IFout
2.7 to 3.3
-
IF output pin.
The inductor must be attached between
V
CC
and output pin due to open collector.
Output frequency is 570 MHz which is
3/4 of local signal frequency 760 MHz.
16
17
External
1 kΩ
17
IFoutb
2.7 to 3.3
-
Balance output of IFout pin.
The inductor must be attached between
V
CC
and output pin due to open collector.
19
I
V
CC
/2
-
I signal input pin.
Apply bias voltage externally.
Maximum balance input voltage is
1 000 mVP-P (balance).
19
20
20
Ib
V
CC
/2
-
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