®
ISL6520A
Data Sheet
December 10, 2009
FN9016.6
Single Synchronous Buck Pulse-Width
Modulation (PWM) Controller
The ISL6520A makes simple work out of implementing a
complete control and protection scheme for a DC/DC
stepdown converter. Designed to drive N-Channel
MOSFETs in a synchronous buck topology, the ISL6520A
integrates the control, output adjustment, monitoring and
protection functions into a single 8 Lead package.
The ISL6520A provides simple, single feedback loop,
voltage-mode control with fast transient response. The
output voltage can be precisely regulated to as low as 0.8V,
with a maximum tolerance of ±1.5% over-temperature and
line voltage variations. A fixed frequency oscillator reduces
design complexity, while balancing typical application cost
and efficiency.
The error amplifier features a 15MHz gain-bandwidth
product and 8V/ms slew rate which enables high converter
bandwidth for fast transient performance. The resulting
PWM duty cycles range from 0% to 100%.
Protection from overcurrent conditions is provided by
monitoring the r
DS(ON)
of the upper MOSFET to inhibit PWM
operation appropriately. This approach simplifies the
implementation and improves efficiency by eliminating the
need for a current sense resistor.
Features
• Operates from +5V Input
• 0.8V to V
IN
Output Range
- 0.8V Internal Reference
- ±1.5% Over Line Voltage and Temperature
• Drives N-Channel MOSFETs
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Cycle
• Lossless, Programmable Overcurrent Protection
- Uses Upper MOSFET’s r
DS(ON)
• Small Converter Size
- 300kHz Fixed Frequency Oscillator
- Internal Soft-Start
- 8 Ld SOIC or 16 Ld 4mmx4mm QFN
• QFN Package:
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Package Outline
- Near Chip Scale Package footprint, which improves
PCB efficiency and has a thinner profile
• Pb-Free (RoHS Compliant)
Pinouts
ISL6520A
(8 LD SOIC)
TOP VIEW
BOOT 1
UGATE 2
GND 3
LGATE 4
8 PHASE
7 COMP/SD
6 FB
5 VCC
Applications
• Power Supplies for Microprocessors
- PCs
- Embedded Controllers
• Subsystem Power Supplies
- PCI/AGP/GTL+ Buses
- ACPI Power Control
- SSTL-2 and DDR SDRAM Bus Termination Supply
• Cable Modems, Set Top Boxes, and DSL Modems
• DSP and Core Communications Processor Supplies
NC
ISL6520A
(16 LD QFN)
TOP VIEW
PHASE
NC
NC
• Memory Supplies
• Personal Computer Peripherals
12 NC
11 COMP/OCSET
10 NC
16
BOOT
UGATE
GND
NC
1
2
3
4
5
LGATE
15
14
13
• Industrial Power Supplies
• 5V-Input DC/DC Regulators
• Low-Voltage Distributed Power Supplies
9
6
NC
7
VCC
8
NC
FB
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004, 2006, 2007, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL6520A
Ordering Information
PART NUMBER
(Note)
ISL6520ACBZ*
ISL6520ACBZA*
ISL6520AIBZ*
ISL6520ACRZ*
ISL6520AIRZ*
ISL6520EVAL1
PART
MARKING
6520 ACBZ
6520 ACBZ
6520 AIBZ
65 20ACRZ
65 20AIRZ
Evaluation Board
TEMP. RANGE
(°C)
0 to +70
0 to +70
-40 to +85
0 to +70
-40 to +85
PACKAGE
(Pb-free)
8 Ld SOIC
8 Ld SOIC
8 Ld SOIC
16 Ld 4x4mm QFN
16 Ld 4x4mm QFN
M8.15
M8.15
M8.15
L16.4x4
L16.4x4
PKG.
DWG. #
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
2
FN9016.6
December 10, 2009
ISL6520A
Block Diagram
V
CC
SAMPLE
AND
HOLD
OC
COMPARATOR
+
-
POR AND
SOFTSTART
BOOT
UGATE
PHASE
+
0.8V
-
FB
COMP/OCSET
20μA
OSCILLATOR
FIXED 300kHz
GND
LGATE
ERROR
AMP
+
-
PWM
COMPARATOR
+
-
INHIBIT
GATE
CONTROL
PWM LOGIC
VCC
Typical Application
V
CC
C
DCPL
VCC
R
OCSET
5
C
BULK
D
BOOT
1
BOOT
C
BOOT
L
OUT
C
HF
COMP/OCSET
7
R
F
C
I
C
F
FB
R
OFFSET
6
3
GND
ISL6520A
2
8
4
UGATE
PHASE
LGATE
+V
O
C
OUT
R
S
3
FN9016.6
December 10, 2009
ISL6520A
Absolute Maximum Ratings
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.0V
Absolute Boot Voltage, V
BOOT
. . . . . . . . . . . . . . . . . . . . . . . +15.0V
Upper Driver Supply Voltage, V
BOOT
- V
PHASE
. . . . . . . . 7.0V (DC)
. . . . . . . . . . . . . . . . . . . . . . . . . . 8.0V (<10ns Pulse Width, 10μJ)
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance
θ
JA
(°C/W)
θ
JC
(°C/W)
SOIC Package (Note 1) . . . . . . . . . . . . . .
95
N/A
QFN Package (Notes 2, 3). . . . . . . . . . . . .
45
7
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±10%
Ambient Temperature Range - ISL6520AC . . . . . . . . . 0°C to +70°C
Ambient Temperature Range - ISL6520AI . . . . . . . . .-40°C to +85°C
Junction Temperature Range. . . . . . . . . . . . . . . . . .-40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1.
θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
VCC SUPPLY CURRENT
Nominal Supply
POWER-ON RESET
Rising VCC POR Threshold
VCC POR Threshold Hysteresis
OSCILLATOR
Frequency
Ramp Amplitude
REFERENCE
Reference Voltage Tolerance
Nominal Reference Voltage
ERROR AMPLIFIER
DC Gain
Gain-Bandwidth Product
Slew Rate
GATE DRIVERS
Upper Gate Source Current
Upper Gate Sink Current
Lower Gate Source Current
Lower Gate Sink Current
PROTECTION / DISABLE
OCSET Current Source
Disable Threshold
NOTE:
Recommended Operating Conditions, Unless Otherwise Noted.
SYMBOL
I
VCC
POR
TEST CONDITIONS
MIN
(Note 4)
2.6
4.19
-
f
OSC
DV
OSC
ISL6520AC
ISL6520AI
V
REF
Limits established by characterization and
are not production tested
ISL6520AC, VCC = 5V
ISL6520AI, VCC = 5V
250
230
-
-1.5
-2.5
-
-
-
-
-
-
-
-
17
14
-
TYP
3.2
4.30
0.25
300
300
1.5
-
-
0.800
88
15
8
-1
1
-1
2
20
20
0.8
MAX
(Note 4)
3.8
4.50
-
340
340
-
+1.5
+2.5
-
-
-
-
-
-
-
-
22
24
-
UNITS
mA
V
V
kHz
kHz
V
P-P
%
%
V
dB
MHz
V/µs
A
A
A
A
µA
µA
V
GBWP
SR
I
UGATE-SRC
V
BOOT
- V
PHASE
= 5V, V
UGATE
= 4V
I
UGATE-SNK
I
LGATE-SRC
V
VCC
= 5V, V
LGATE
= 4V
I
LGATE-SNK
I
OCSET
V
DISABLE
ISL6520AC
ISL6520AI
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
4
FN9016.6
December 10, 2009
ISL6520A
Functional Pin Description
VCC
This pin provides the bias supply for the ISL6520A, as well
as the lower MOSFET’s gate. Connect a well-decoupled 5V
supply to this pin.
During soft-start, and all the time during normal converter
operation, this pin represents the output of the error
amplifier. Use this pin, in combination with the
COMP/OCSET pin, to compensate the voltage-control
feedback loop of the converter.
Pulling COMP/OCSET to a level below 0.8V disables the
controller. Disabling the ISL6520A causes the oscillator to
stop, the LGATE and UGATE outputs to be held low, and the
softstart circuitry to re-arm.
FB
This pin is the inverting input of the internal error amplifier.
Use this pin, in combination with the COMP/OCSET pin, to
compensate the voltage-control feedback loop of the
converter.
LGATE
Connect this pin to the lower MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the lower
MOSFET. This pin is also monitored by the adaptive
shoot-through protection circuitry to determine when the
lower MOSFET has turned off.
GND
This pin represents the signal and power ground for the IC.
Tie this pin to the ground island/plane through the lowest
impedance connection available.
PHASE
Connect this pin to the upper MOSFET’s source. This pin is
used to monitor the voltage drop across the upper MOSFET
for overcurrent protection.
Functional Description
Initialization
The ISL6520A automatically initializes upon receipt of power.
The Power-On Reset (POR) function continually monitors the
bias voltage at the VCC pin. The POR function initiates the
Overcurrent Protection (OCP) sampling and hold operation
after the supply voltage exceeds its POR threshold. Upon
completion of the OCP sampling and hold operation, the POR
function initiates the soft-start operation.
UGATE
Connect this pin to the upper MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the upper
MOSFET. This pin is also monitored by the adaptive
shoot-through protection circuitry to determine when the
upper MOSFET has turned off.
Overcurrent Protection
The overcurrent function protects the converter from a shorted
output by using the upper MOSFET’s on-resistance, r
DS(ON)
,
to monitor the current. This method enhances the converter’s
efficiency and reduces cost by eliminating a current sensing
resistor.
The overcurrent function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R
OCSET
)
programs the overcurrent trip level (see “Typical Application”
on page 3).
Immediately following POR, the ISL6520A initiates the
Overcurrent Protection sampling and hold operation. First,
the internal error amplifier is disabled. This allows an internal
20mA current sink to develop a voltage across R
OCSET
. The
ISL6520A then samples this voltage at the COMP pin. This
sampled voltage, which is referenced to the VCC pin, is held
internally as the Overcurrent Set Point.
When the voltage across the upper MOSFET, which is also
referenced to the VCC pin, exceeds the Overcurrent Set
Point, the overcurrent function initiates a soft-start sequence.
Figure 1 shows the inductor current after a fault is introduced
while running at 15A. The continuous fault causes the
ISL6520A to go into a hiccup mode with a typical period of
25ms. The inductor current increases to 18A during the soft-
start interval and causes an overcurrent trip. The converter
dissipates very little power with this method. The measured
input power for the conditions of Figure 1 is only 1.5W.
FN9016.6
December 10, 2009
BOOT
This pin provides ground referenced bias voltage to the
upper MOSFET driver. A bootstrap circuit is used to create a
voltage suitable to drive a logic-level N-channel MOSFET.
COMP/OCSET
This is a multiplexed pin. During a short period of time
following power-on reset (POR), this pin is used to determine
the overcurrent threshold of the converter. Connect a
resistor (R
OCSET
) from this pin to the drain of the upper
MOSFET (V
CC
). R
OCSET
, an internal 20µA current source
(I
OCSET
), and the upper MOSFET on-resistance (r
DS(ON)
)
set the converter overcurrent (OC) trip point according to
Equation 1:
I
OCSET
xR
OCSET
I
PEAK
= ------------------------------------------------
-
r
DS
(
ON
)
(EQ. 1)
Internal circuitry of the ISL6520A will not recognize a voltage
drop across R
OCSET
larger than 0.5V. Any voltage drop
across R
OCSET
that is greater than 0.5V will set the
overcurrent trip point to:
0.5V
I
PEAK
= ----------------------
r
DS
(
ON
)
(EQ. 2)
An overcurrent trip cycles the soft-start function.
5
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