End of Life. Last Available Purchase Date is 31-Dec-2014
Si9120
Vishay Siliconix
Universal Input Switchmode Controller
FEATURES
10- to 450-V Input Range
Current-Mode Control
125-mA Output Drive
Internal Start-Up Circuit
Internal Oscillator (1 MHz)
SHUTDOWN and RESET
DESCRIPTION
The Si9120 is a BiC/DMOS integrated circuit designed for use
in low-power, high-efficiency off-line power supplies.
High-voltage DMOS inputs allow the controller to work over a
wide range of input voltages (10- to 450-VDC). Current-mode
PWM control circuitry is implemented in CMOS to reduce
quiescent current to less than 1.5 mA.
A CMOS output driver provides high-speed switching for
MOSFET devices with gate charge, Q
g
, up to 25 nC, enough
to supply 30 W of output power at 100 kHz. These devices,
when combined with an output MOSFET and transformer, can
be used to implement single-ended power converter
topologies (i.e., flyback and forward).
The Si9120 is available in both standard and lead (Pb)-free
16-pin plastic DIP and SOIC packages which are specified to
operate over the industrial temperature range of −40 C to
85 C.
FUNCTIONAL BLOCK DIAGRAM
OSC
IN
9
OSC
OUT
8
FB
15
COMP
14
Error
Amplifier
DISCHARGE
10
OSC
2V
−
+
+
−
1.2 V
C/L
Comparator
Clock (
1
/
2
f
OSC
)
R
Q
S
V
REF
11
−
+
4 V (1%)
Ref
Gen
To
V
CC
Current-Mode
Comparator
5
6
OUTPUT
−V
IN
BIAS
V
CC
+V
IN
16
Current
Sources
7
1
To
Internal
Circuits
4
V
CC
12
13
SENSE
−
8.1 V
−
+
8.6 V
Pre-Regulator/Start-Up
+
Undervoltage Comparator
Q
S
R
SHUTDOWN
RESET
Applications information, see AN707 and AN708.
Document Number: 70006
S-42042—Rev. H, 15-Nov-04
www.vishay.com
1
Si9120
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to
−V
IN
(Note: V
CC
< +V
IN
+ 0.3 V)
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
+V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 V
Logic Inputs (RESET
SHUTDOWN, OSC IN, OSC OUT) . . . . . . . . . . . . . . .
−0.3
V to V
CC
+ 0.3 V
Linear Input
(FEEDBACK, SENSE, BIAS, V
REF
) . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to 7 V
HV Pre-Regulator Input Current (continuous) . . . . . . . . . . . . . . . . . . . . 5 mA
a
Continuous Output Current (Source or Sink) . . . . . . . . . . . . . . . . . . . 125 mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−65
to 150_C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−40
to 85_C
Junction Temperature (T
J
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C
Power Dissipation (Package)
b
16-Pin Plastic DIP (J Suffix)
c
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750 mW
16-Pin SOIC (Y Suffix)
d
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
Thermal Impedance (Q
JA
)
16-Pin Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167_C/W
16-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140_C/W
Notes
a. Continuous current may be limited by the applications maximum input
voltage and the package power dissipation.
b. Device mounted with all leads soldered or welded to PC board.
c. Derate 6 mW/_C above 25_C.
d. Derate 7.2 mW/_C above 25_C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Voltages Referenced to
−V
IN
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.5 V to 13.5 V
+V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 450 V
f
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 kHz to 1 MHz
R
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 kW to 1 MW
Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
CC
−
3 V
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
CC
SPECIFICATIONS
a
Specific Test Conditions
Parameter
Reference
Output Voltage
Output Impedance
e
Short Circuit Current
Temperature Stability
e
V
R
Z
OUT
I
SREF
T
REF
V
REF
=
−V
IN
OSC IN =
−
V
IN
(OSC Disabled)
R
L
= 10 MW
Room
Full
Room
Room
Full
3.88
3.82
15
70
4.0
30
100
0.5
4.12
4.14
45
130
1.0
V
kW
mA
mV/_C
DISCHARGE =
−V
IN
= 0 V,
V
CC
= 10 V +V
IN
= 300 V
R
BIAS
= 390 kW, R
OSC
= 330 kW
LIMITS
D Suffix
−40
to 85_C
TEMP
B
MIN
C
TYP
D
MAX
C
Symbol
Unit
Oscillator
Maximum Frequency
e
f
MAX
R
OSC
= 0
C
STRAY
Pin 9
v
5 pF
R
OSC
= 330 kW
C
STRAY
Pin 9
v
5 pF
R
OSC
= 150 kW
Df/f
= f(13.5 V)
−
f(9.5 V) / f(9.5 V)
Room
Room
Room
Room
Full
1
80
160
3
100
200
10
200
120
kHz
240
15
500
%
ppm/_C
MHz
Initial Accuracy
Voltage Stability
Temperature Coefficient
e
f
OSC
Df/f
T
OSC
Error Amplifier
Feedback Input Voltage
Input BIAS Current
Input OFFSET Voltage
Open Loop Voltage Gain
e
Unity Gain
Bandwidth
e
V
FB
I
FB
V
OS
A
VOL
BW
FB Tied to COMP
OSC IN =
−
V
IN
(OSC Disabled)
OSC IN =
−
V
IN
, V
FB
= 4 V
OSC IN =
−
V
IN
OSC IN =
−
V
IN
OSC IN =
−
V
IN
Room
Room
Room
Room
Room
60
1.0
3.92
25
"15
80
1.5
4.08
500
"40
V
nA
mV
dB
MHz
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Document Number: 70006
S-42042—Rev. H, 15-Nov-04
Si9120
Vishay Siliconix
SPECIFICATIONS
a
Specific Test Conditions
Parameter
Error Amplifier (Cont’d)
Dynamic Output Impedance
e
Output Current
Power Supply Rejection
Z
OUT
I
OUT
PSRR
Error Amp configured for 60 dB gain
Source V
FB
= 3.4 V
Sink V
FB
= 4.5 V
9.5 V
v
V
CC
v
13.5 V
Room
Room
Room
Room
0.12
50
1000
−2.0
0.15
70
2000
−1.4
W
mA
dB
DISCHARGE =
−V
IN
= 0 V,
V
CC
= 10 V +V
IN
= 300 V
R
BIAS
= 390 kW, R
OSC
= 330 kW
LIMITS
D Suffix
−40
to 85_C
TEMP
B
MIN
C
TYP
D
MAX
C
Symbol
Unit
Current Limit
Threshold Voltage
Delay to Output
e
V
SOURCE
t
d
V
FB
= 0 V
V
SENSE
= 1.5 V, See Figure 1
Room
Room
1.0
1.2
100
1.4
150
V
ns
Pre-Regulator/Start-Up
Input Voltage
Input Leakage Current
V
CC
Pre-Regulator Turn-Off Threshold
Voltage
Undervoltage Lockout
V
REG
−V
UVLO
+V
IN
+I
IN
V
REG
V
UVLO
V
DELTA
I
IN
= 10
mA
V
CC
w
9.4 V
I
PRE-REGULATOR
= 10
mA
Room
Room
Room
Room
Room
7.8
7.0
0.3
8.6
8.1
0.6
450
10
9.4
8.9
V
V
mA
Supply
Supply Current
Bias Current
I
CC
I
BIAS
C
L
= 500 pF at Pin 5
Room
Room
10
0.85
15
1.5
20
mA
mA
Logic
SHUTDOWN Delay
e
SHUTDOWN Pulse Width
e
RESET Pulse
Width
e
Latching Pulse Width
SHUTDOWN and RESET Low
e
Input Low Voltage
Input High Voltage
Input Current Input Voltage High
Input Current Input Voltage Low
t
SD
t
SW
t
RW
t
LW
V
IL
V
IH
I
IH
I
IL
V
IN
= 10 V
V
IN
= 0 V
See Figure 3
C
L
= 500 pF, V
SENSE
=
−V
IN
See Figure 2
Room
Room
Room
Room
Room
Room
Room
Room
−35
8.0
1
−25
5
50
50
25
2.0
V
mA
50
100
ns
Output
Output High Voltage
Output Low Voltage
Output Resistance
Rise Time
e
Fall
Time
e
V
OH
V
OL
R
OUT
t
r
t
f
I
OUT
=
−10
mA
I
OUT
= 10 mA
I
OUT
= 10 mA, Source or Sink
C
L
= 500 pF
Room
Full
Room
Full
Room
Full
Room
Room
40
20
25
40
75
9.7
9.5
0.3
0.5
30
50
75
V
W
ns
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25_C, Cold and Hot = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
a. 250 V
v
+V
IN
380 V place a 10-kW,
1
/
4
-W resistor in series with a +V
IN
(Pin1).
380 V
v
+V
IN
450 V place a 15-kW,
1
/
4
-W resistor in series with a +V
IN
(Pin1).
Connect a 0.01-mfd capacitor between +V
IN
(Pin 1) and
−V
IN
(Pin 6).
Document Number: 70006
S-42042—Rev. H, 15-Nov-04
www.vishay.com
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Si9120
Vishay Siliconix
TIMING WAVEFORMS
SENSE
0
V
CC
OUTPUT
0
−
1.5 V
−
50%
t
d
t
r
v
10 ns
V
CC
SHUTDOWN
0
V
CC
OUTPUT
0
50%
−
t
SD
t
f
v
10 ns
90%
90%
−
FIGURE 1.
FIGURE 2.
V
CC
SHUTDOWN
0
V
CC
RESET
0
50%
−
50%
−
t
SW
50%
t
LW
50%
t
RW
50%
t
r
, t
f
v
10 ns
FIGURE 3.
TYPICAL CHARACTERISTICS
Output Switching Frequency
vs. Oscillator Resistance
1M
f OUT (Hz)
100 k
10 k
10 k
100 k
r
OSC
−
Oscillator Resistance (W)
1M
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Document Number: 70006
S-42042—Rev. H, 15-Nov-04
Si9120
Vishay Siliconix
PIN CONFIGURATIONS AND ORDERING INFORMATION
Dual-In-Line
+V
IN
NC*
NC*
SENSE
OUTPUT
−V
IN
V
CC
OSC OUT
1
2
3
4
5
6
7
8
Top View
16
15
14
13
12
11
10
9
BIAS
FB
COMP
RESET
SHUTDOWN
V
REF
DISCHARGE
OSC IN
SENSE
OUTPUT
−V
IN
V
CC
OSC OUT
4
5
6
7
8
+V
IN
1
SOIC
16
15
14
13
12
11
10
9
BIAS
FB
COMP
RESET
SHUTDOWN
V
REF
DISCHARGE
OSC IN
Top View
Note: Pins 2 and 3 are removed
ORDERING INFORMATION
Part Number
Si9120DY
Si9120DY-T1
Si9120DY-T1—E3
Si9120DJ
Si9120DJ—E3
−40
to 85_C
PDIP-16
PDIP 16
SOIC-16
Temperature Range
Package
DETAILED DESCRIPTION
Pre-Regulator/Start-Up Section
Due to the low quiescent current requirement of the Si9120
control circuitry, bias power can be supplied from the
unregulated input power source, from an external regulated
low-voltage supply, or from an auxiliary “bootstrap” winding on
the output inductor or transformer.
When power is first applied during start-up, +V
IN
(pin 1) will
draw a constant current. The magnitude of this current is
determined by a high-voltage depletion MOSFET which is
connected between +V
IN
and V
CC
(pin 7). This start-up
circuitry provides initial power to the IC by charging an external
bypass capacitance connected to the V
CC
pin. The constant
current is disabled when V
CC
exceeds 8.6 V. If V
CC
is not
forced to exceed the 8.6-V threshold, then V
CC
will be
regulated to a nominal value of 8.6 V by the pre-regulator
circuit.
As the supply voltage rises toward the normal operating
conditions, an internal undervoltage (UV) lockout circuit keeps
the output driver disabled until V
CC
exceeds the undervoltage
lockout threshold (typically 8.1 V). This guarantees that the
Document Number: 70006
S-42042—Rev. H, 15-Nov-04
control logic will be functioning properly and that sufficient gate
drive voltage is available before the MOSFET turns on. The
design of the IC is such that the undervoltage lockout threshold
will be at least 300 mV less than the pre-regulator turn-off
voltage. Power dissipation can be minimized by providing an
external power source to V
CC
such that the constant current
source is always disabled.
Note:
When driving large MOSFETs at high frequency without
a bootstrap V
CC
supply, power dissipation in the pre-regulator
may exceed the power rating of the IC package. For operation
of +V
IN
> 250 V, a 10-kW,
1
/
4
-W resistor should be placed in
series with +V
IN
(Pin 1). For +V
IN
> 380 V, a 15-kW,
1
/
4
-W
resistor is recommended.
BIAS
To properly set the bias for the Si9120, a 390-kW resistor
should be tied from BIAS (pin 16) to
−V
IN
(pin 6). This
determines the magnitude of bias current in all of the analog
sections and the pull-up current for the SHUTDOWN and
RESET pins. The current flowing in the bias resistor is
nominally 15
mA.
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