74LVC540A
Low-Voltage CMOS
Octal Buffer
Flow Through Pinout
With 5 V−Tolerant Inputs and Outputs
(3−State, Inverting)
The 74LVC540A is a high performance, inverting octal buffer
operating from a 1.2 to 3.6 V supply. This device is similar in function
to the MC74LCX240, while providing flow through architecture.
High impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A V
I
specification of 5.5 V allows
74LVC540A inputs to be safely driven from 5 V devices. The
74LVC540A is suitable for memory address driving and all TTL level
bus oriented transceiver applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OE1, OE2) inputs, when HIGH, disables the outputs by placing them
in a HIGH Z condition.
Features
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MARKING
DIAGRAMS
20
1
SOIC−20 WB
DW SUFFIX
CASE 751D
20
LVC540A
AWLYYWWG
1
20
20
1
TSSOP−20
DT SUFFIX
CASE 948E
A
L, WL
Y, YY
W, WW
G or
G
LVC
540A
ALYW
G
G
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
•
•
•
•
•
•
Designed for 1.2 to 3.6 V V
CC
Operation
5 V Tolerant − Interface Capability With 5 V TTL Logic
Supports Live Insertion and Withdrawal
I
OFF
Specification Guarantees High Impedance When V
CC
= 0 V
24 mA Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (10
mA)
Substantially Reduces System Power Requirements
•
Latchup Performance Exceeds 250 mA
•
ESD Performance:
♦
Human Body Model > 2000 V
♦
Machine Model > 200 V
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
©
Semiconductor Components Industries, LLC, 2015
1
December, 2015 − Rev. 0
Publication Order Number:
74LVC540A/D
74LVC540A
OE1
OE2
V
CC
20
OE2
19
O0
18
O1
17
O2
16
O3
15
O4
14
O5
13
O6
12
O7
11
D1
3
17
O1
1
19
2
18
O0
D0
D2
4
16
O2
1
OE1
2
D0
3
D1
4
D2
5
D3
6
D4
7
D5
8
D6
9
D7
10
GND
D3
5
15
O3
Figure 1. Pinout: 20−Lead
(Top View)
D4
6
14
O4
D5
7
13
O5
PIN NAMES
Pins
OEn
Dn
On
Function
Output Enable Inputs
Data Inputs
3−State Outputs
D6
8
12
O6
D7
9
11
O7
Figure 2. Logic Diagram
TRUTH TABLE
Inputs
OE1
L
L
X
H
OE2
L
L
H
X
Dn
L
H
X
X
Outputs
On
H
L
Z
Z
H = High Voltage Level
L = Low Voltage Level
Z = High Impedance State
X = High or Low Voltage Level and Transitions are Acceptable
For I
CC
reasons, DO NOT FLOAT Inputs
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2
74LVC540A
MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
Parameter
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Value
−0.5 to +6.5
−0.5
≤
V
I
≤
+6.5
−0.5
≤
V
O
≤
+6.5
−0.5
≤
V
O
≤
V
CC
+ 0.5
I
IK
I
OK
DC Input Diode Current
DC Output Diode Current
−50
−50
+50
I
O
I
CC
I
GND
T
STG
T
L
T
J
q
JA
MSL
I
LATCHUP
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for
10 Seconds
Junction Temperature Under Bias
Thermal Resistance (Note 2)
Moisture Sensitivity
Latch−up Performance at V
CC
= 3.6 V
and 125°C (Note 3)
±50
±100
±100
−65 to +150
T
L
= 260
T
J
= 135
SOIC = 65.8
TSSOP = 110.7
Level 1
±250
mA
Output in 3−State
Output in HIGH or LOW State
(Note 1)
V
I
< GND
V
O
< GND
V
O
> V
CC
Condition
Unit
V
V
V
V
mA
mA
mA
mA
mA
mA
°C
°C
°C
°C/W
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. I
O
absolute maximum rating must be observed.
2. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
3. Tested to EIA/JES078.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
Supply Voltage
Operating
Functional
Input Voltage
Output Voltage
HIGH or LOW State
3−State
HIGH Level Output Current
V
CC
= 3.0 V − 3.6 V
V
CC
= 2.7 V − 3.0 V
LOW Level Output Current
V
CC
= 3.0 V − 3.6 V
V
CC
= 2.7 V − 3.0 V
Operating Free−Air Temperature
Input Transition Rise or Fall Rate, V
IN
from 0.8 V to 2.0 V, V
CC
= 3.0 V
−40
0
Parameter
Min
1.65
1.2
0
0
0
Typ
Max
3.6
3.6
5.5
V
CC
5.5
mA
−24
−12
mA
24
12
+125
10
°C
ns/V
V
V
Units
V
V
I
V
O
I
OH
I
OL
T
A
Dt/DV
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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3
74LVC540A
DC ELECTRICAL CHARACTERISTICS
−405C to +855C
Min
1.08
0.65 x
V
CC
1.7
2.0
−
−
−
−
Typ
(Note 4)
−
−
−
−
−
−
−
−
Max
−
−
−
−
0.12
0.35 x
V
CC
0.7
0.8
−405C to +1255C
Min
1.08
0.65 x
V
CC
1.7
2.0
−
−
−
−
Typ
(Note 4)
−
−
−
−
−
−
−
−
Max
−
−
−
−
0.12
0.35 x
V
CC
0.7
0.8
V
−
−
−
−
−
−
−
−
−
−
−
−
V
CC
−
0.3
1.05
1.65
2.05
2.25
2.0
−
−
−
−
−
−
−
−
−
−
−
−
V
−
−
−
−
−
±0.1
±0.1
±0.1
0.1
5
0.2
0.45
0.6
0.4
0.55
±5
±5
±10
10
500
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
±0.1
±0.1
±0.1
0.1
5
0.3
0.65
0.8
0.6
0.8
±20
±20
±20
40
5000
mA
mA
mA
mA
mA
V
Symbol
V
IH
Parameter
HIGH−level input
voltage
Conditions
V
CC
= 1.2 V
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
Unit
V
V
IL
LOW−level input
voltage
V
CC
= 1.2 V
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
OH
HIGH−level output
voltage
V
I
= V
IH
or V
IL
I
O
= −100
mA;
V
CC
= 1.65 V to 3.6 V
I
O
= −4 mA; V
CC
= 1.65 V
I
O
= −8 mA; V
CC
= 2.3 V
I
O
= −12 mA; V
CC
= 2.7 V
I
O
= −18 mA; V
CC
= 3.0 V
I
O
= −24 mA; V
CC
= 3.0 V
V
CC
−
0.2
1.2
1.8
2.2
2.4
2.2
V
OL
LOW−level output
voltage
V
I
= V
IH
or V
IL
I
O
= 100
mA;
V
CC
= 1.65 V to 3.6 V
I
O
= 4 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= −24 mA; V
CC
= 3.0 V
−
−
−
−
−
−
−
−
−
−
I
I
I
OZ
I
OFF
I
CC
DI
CC
Input leakage current
OFF−state output
current
Power−off leakage
current
Supply current
Additional supply
current
V
I
= 5.5V or GND V
CC
= 3.6 V
VI = VIH or VIL;
V
O
= 5.5 V or GND; V
CC
= 3.6 V
V
I
or V
O
= 5.5 V; V
CC
= 0.0 V
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 3.6 V
per input pin;
V
I
= V
CC
− 0.6 V; I
O
= 0 A;
V
CC
= 2.7 V to 3.6 V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. All typical values are measured at T
A
= 25°C and V
CC
= 3.3 V, unless stated otherwise.
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4
74LVC540A
AC ELECTRICAL CHARACTERISTICS
(t
R
= t
F
= 2.5 ns)
−405C to +855C
Symbol
t
pd
Parameter
Propagation Delay (Note 6)
nDn to nOn
Conditions
V
CC
= 1.2 V
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V
t
en
Enable Time (Note 7)
nOE to nOn
V
CC
= 1.2 V
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V
t
dis
Disable Time (Note 8)
nOE to nOn
V
CC
= 1.2 V
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V
t
sk(0)
Output Skew Time (Note 9)
Min
−
1.0
1.0
1.0
1.0
−
1.0
1.0
1.0
1.0
−
1.0
1.0
1.0
1.0
−
Typ
5
18.0
−
−
−
−
20.0
−
−
−
−
18.0
−
−
−
−
−
Max
−
16.4
7.8
7.1
5.3
−
16.5
10.5
8.0
6.6
−
15.9
9.0
8.2
7.4
1.0
−405C to +1255C
Min
−
1.0
1.0
1.0
1.0
−
1.0
1.0
1.0
1.0
−
1.0
1.0
1.0
1.0
−
Typ
5
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Max
−
16.4
7.8
7.1
5.3
−
16.5
10.5
8.0
6.6
−
15.9
9.0
8.2
7.4
1.5
ns
ns
ns
Unit
ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Typical values are measured at T
A
= 25°C and V
CC
= 3.3 V, unless stated otherwise.
6. t
pd
is the same as t
PLH
and t
PHL
.
7. t
en
is the same as t
PZL
and t
PZH
.
8. t
dis
is the same as t
PLZ
and t
PHZ
.
9. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
T
A
= +25°C
Symbol
V
OLP
V
OLV
Characteristic
Dynamic LOW Peak Voltage (Note 10)
Dynamic LOW Valley Voltage (Note
10)
Condition
V
CC
= 3.3 V, C
L
= 50 pF, V
IH
= 3.3 V, V
IL
= 0 V
V
CC
= 2.5 V, C
L
= 30 pF, V
IH
= 2.5 V, V
IL
= 0 V
V
CC
= 3.3 V, C
L
= 50 pF, V
IH
= 3.3 V, V
IL
= 0 V
V
CC
= 2.5 V, C
L
= 30 pF, V
IH
= 2.5 V, V
IL
= 0 V
Min
Typ
0.8
0.6
−0.8
−0.6
Max
Unit
V
V
10. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
C
IN
C
OUT
C
PD
Parameter
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
(Note 11)
Condition
V
CC
= 3.3 V, V
I
=
0
V or V
CC
V
CC
= 3.3 V, V
I
=
0
V or V
CC
Per input; V
I
= GND or V
CC
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 3.0 V to 3.6 V
11. C
PD
is used to determine the dynamic power dissipation (P
D
in
mW).
P
D
= C
PD
*
V
CC2
x
fi
*
N +
S
(C
L
x
V
CC2
x
fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
C
L
= output load capacitance in pF V
CC
= supply voltage in Volts
N = number of outputs switching
S(C
L
*
V
CC2
x fo) = sum of the outputs.
7.7
11.3
14.4
Typical
5.0
7.0
Unit
pF
pF
pF
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