HCF4532B
8-BIT PRIORITY ENCODER
s
s
s
s
s
s
s
s
s
CONVERTS FROM 1 TO 8 TO INPUTS
BINARY
PROVIDES CASCADING FEATURE TO
HANDLE ANY NUMBER OF INPUTS
GROUP SELECT INDICATES ONE OR
MORE PRIORITY INPUTS
QUIESCENT CURRENT SPECIFIED UP TO
20V
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
5V, 10V AND 15V PARAMETRIC RATINGS
INPUT LEAKAGE CURRENT
I
I
= 100nA (MAX) AT V
DD
= 18V T
A
= 25°C
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DIP
SOP
ORDER CODES
PACKAGE
DIP
SOP
TUBE
HCF4532BEY
HCF4532BM1
T&R
DESCRIPTION
HCF4532B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP and SOP packages.
HCF4532B consists of a combinational logic that
encodes the highest priority input (D7-D0) to a
3-bit binary code. The eight inputs, D7 through D0,
PIN CONNECTION
so
b
O
r
P
te
le
du
o
(s
ct
-
)
so
b
O
each have an assigned priority. D7 is the highest
priority and D0 is the lowest. The priority encoder
is inhibited when the chip enable input E
I
is low.
When E
I
is high, the binary representation of the
highest priority input appears on output lines
Q2-Q0, and the group select line GS is high to
indicate that priority inputs are present. The
enable out (E
O
) is high when no priority inputs are
present. If any input is high, E
O
is low and all
cascaded lower order stages are disabled.
te
le
ro
P
uc
d
s)
t(
HCF4532M013TR
May 2004
Rev. 2
1/13
HCF4532B
Figure 3: Logic Diagram
Table 3: Absolute Maximum Ratings
b
O
Symbol
V
DD
V
I
I
I
P
D
T
op
T
stg
so
r
P
te
le
Supply Voltage
du
o
(s
ct
-
)
so
b
O
te
le
ro
P
uc
d
s)
t(
Parameter
Value
-0.5 to +22
-0.5 to V
DD
+ 0.5
±
10
200
100
-55 to +125
-65 to +150
Unit
V
V
mA
mW
mW
°C
°C
DC Input Voltage
DC Input Current
Power Dissipation per Package
Power Dissipation per Output Transistor
Operating Temperature
Storage Temperature
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values are referred to V
SS
pin voltage.
3/13
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
