Low Skew, 1-to-4, Crystal Oscillator/LVCMOS-
to-3.3V, 2.5V LVPECL/LVCMOS Fanout Buffer
General Description
The ICS8534I-13 is a low skew, high performance 1-to-4 Crystal
Oscillator/LVCMOS-to-3.3V, 2.5V LVPECL/LVCMOS fanout buffer.
The ICS8534I-13 has selectable single-ended clock or crystal inputs.
The single-ended clock input accepts LVCMOS or LVTTL input levels
and translate them to 3.3V LVPECL levels. The output enable is
internally synchronized to eliminate runt pulses on the outputs during
asynchronous assertion/deassertion of the clock enable pin.
Guaranteed output and part-to-part skew characteristics make the
ICS8534I-13 ideal for those applications demanding well defined
performance and repeatability.
ICS8534I-13
DATA SHEET
Features
•
•
•
•
•
•
•
•
•
•
One differential LVPECL output, and
three single-ended LVCMOS outputs
Selectable LVCMOS/LVTTL CLK or crystal inputs
CLK can accept the following input levels: LVCMOS, LVTTL
Crystal frequency range: 12MHz – 40MHz
Maximum output frequency: 266MHz
Propagation delay: 2.1ns (maximum), 3.3V LVPECL output
Additive phase jitter, RMS: 0.221ps (typical), 3.3V LVPECL output
Full 3.3V or 2.5V operating supply
-40°C to 85°C ambient operating temperature
Lead-free (RoHS 6) packaging
Block Diagram
CLK_EN
Pullup
Pin Assignment
D
LE
CLK_EN
XTAL_IN
XTAL_OUT
V
CC
CLK
CLK_SEL
V
EE
V
CCO_LVPECL
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Q3
Q2
V
CCO_LVCMOS
Q1
V
EE
nc
nQ0
Q0
CLK
Pulldown
0
LVPECL
Q0
nQ0
XTAL_IN
OSC
XTAL_OUT
CLK_SEL
Pullup
1
LVCMOS
Q1
ICS8534I-13
16-Lead SOIC, 150MIL
3.9mm x 9.9mm x 1.375mm package body
M Package
Top View
Q2
Q3
ICS8534BMI-13 REVISION C AUGUST 9, 2013
1
©2013 Integrated Device Technology, Inc.
ICS8534I-13 Data Sheet
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/LVCMOS- TO-3.3V, 2.5V LVPECL/LVCMOS FANOUT BUFFER
Pin Description and Pin Characteristic Tables
Table 1. Pin Descriptions
Number
1
2,
3
4
5
6
7, 12
8
9, 10
11
13, 15, 16
14
Name
CLK_EN
XTAL_IN,
XTAL_OUT
V
CC
CLK
CLK_SEL
V
EE
V
CCO_LVPECL
Q0, nQ0
nc
Q1, Q2, Q3
V
CCO_LVCMOS
Input
Type
Pullup
Description
Synchronizing clock enable. When HIGH, clock outputs follows clock input.
When LOW, Q outputs are forced low, nQ0 output is forced high. LVCMOS
/ LVTTL interface levels.
Crystal oscillator interface. XTAL_IN is the input.
XTAL_OUT is the output.
Positive supply pin.
Pulldown
Pullup
Clock input. LVCMOS / LVTTL interface levels.
Clock select input. When HIGH, selects XTAL inputs.
When LOW, selects CLK input. LVCMOS / LVTTL interface levels.
Negative supply pins.
Output power supply mode for LVPECL clock outputs.
Differential clock outputs. LVPECL interface levels.
No connect.
Single ended clock outputs. LVCMOS / LVTTL interface levels.
Output power supply mode for LVCMOS / LVTTL clock outputs.
Input
Power
Input
Input
Power
Power
Output
Unused
Output
Power
NOTE:
Pullup
and
Pulldown
refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
C
PD
R
PULUP
R
PULLDOWN
R
OUT
Parameter
Input Capacitance
Power Dissipation
Capacitance (per
output)
Input Pullup Resistor
Input Pulldown Resistor
Output Impedance
Q[1:3]
V
CC
, V
CC_LVCMOS
= 3.465V
V
CC
, V
CC_LVCMOS
= 2.625V
Q[1:3]
V
CC
, V
CC_LVCMOS
= 2.625V
5
51
51
15
20
pF
k
k
Test Conditions
Crystal Not Included
V
CC
, V
CC_LVCMOS
= 3.465V
Minimum
Typical
4
8
Maximum
Units
pF
pF
ICS8534BMI-13 REVISION C AUGUST 9, 2013
2
©2013 Integrated Device Technology, Inc.
ICS8534I-13 Data Sheet
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/LVCMOS- TO-3.3V, 2.5V LVPECL/LVCMOS FANOUT BUFFER
Function Tables
Table 3A. Control Input Function Table
Inputs
CLK_EN
0
0
1
1
CLK_SEL
0
1
0
1
Selected Source
CLK
XTAL_IN,
XTAL_OUT
CLK
XTAL_IN,
XTAL_OUT
Q0
Disabled; LOW
Disabled; LOW
Enabled
Enabled
Outputs
nQ0
Disabled; HIGH
Disabled; HIGH
Enabled
Enabled
Q[1:3]
Disabled; LOW
Disabled; LOW
Enabled
Enabled
NOTE: After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock or crystal oscillator edge as
shown in Figure 1.
NOTE: In the active mode, the state of the outputs are a function of the CLK input as described in Table 3B.
Disabled
Enabled
CLK
CLK_EN
nQ0
Q0:Q3
Figure 1. CLK_EN Timing Diagram
Table 3B. Control Input Function Table
Inputs
CLK
0 (default)
1
Q0
LOW
HIGH
Outputs
nQ0
HIGH
LOW
Q[1:3]
LOW
HIGH
ICS8534BMI-13 REVISION C AUGUST 9, 2013
3
©2013 Integrated Device Technology, Inc.
ICS8534I-13 Data Sheet
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/LVCMOS- TO-3.3V, 2.5V LVPECL/LVCMOS FANOUT BUFFER
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These ratings are stress
specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the
DC Characteristics or AC
Characteristics
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Item
Supply Voltage, V
CC
Inputs, V
I
(LVCMOS)
Outputs, V
O
(LVCMOS)
Inputs, V
I
(LVPECL)
Outputs, I
O
(LVPECL)
Continuous Current
Surge Current
Package Thermal Impedance,
JA
Storage Temperature, T
STG
Rating
4.6V
-0.5V to V
CC
+ 0.5V
-0.5V to V
CCO_LVCMOS
+ 0.5V
-0.5V to V
CC
+ 0.5V
50mA
100mA
76C/W (0 mps)
-65C to 150C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics,
V
CC
= V
CCO_LVPECL
= V
CCO_LVCMOS
= 3.3V ± 5%, T
A
= -40°C to 85°C
Symbol
V
CC
V
CCO_LVPECL
V
CCO_LVCMOS
I
EE
I
CCO_LVPECL
I
CCO_LVCMOS
Parameter
Power Supply Voltage
Power Supply Voltage
Power Supply Current
Power Supply Current
Power Supply Current
No Load
No Load
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
65
25
5
Units
V
V
mA
mA
mA
Table 4B. Power Supply DC Characteristics,
V
CC
= V
CCO_LVPECL
= V
CCO_LVCMOS
= 2.5V ± 5%, T
A
= -40°C to 85°C
Symbol
V
CC
V
CCO_LVPECL
V
CCO_LVCMOS
I
EE
I
CCO_LVPECL
I
CCO_LVCMOS
Parameter
Power Supply Voltage
Power Supply Voltage
Power Supply Current
Power Supply Current
Power Supply Current
No Load
No Load
Test Conditions
Minimum
2.375
2.375
Typical
2.5
2.5
Maximum
2.625
2.625
60
22
4
Units
V
V
mA
mA
mA
ICS8534BMI-13 REVISION C AUGUST 9, 2013
4
©2013 Integrated Device Technology, Inc.
ICS8534I-13 Data Sheet
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/LVCMOS- TO-3.3V, 2.5V LVPECL/LVCMOS FANOUT BUFFER
Table 4C. LVCMOS/LVTTL DC Characteristics,
V
CC
= V
CCO_LVCMOS
= 2.5V ± 5%, T
A
= -40°C to 85°C
Symbol
V
IH
Parameter
Input High Voltage
Test Conditions
V
CC
= 3.3V
V
CC
= 2.5V
Input Low Voltage
Input
Hysteresis
Input
High Current
CLK_EN,
CLK_SEL
CLK
CLK_EN,
CLK_SEL
CLK
CLK_EN,
CLK_SEL
V
CC
= V
IN
= 3.465V or 2.625V
V
CC
= V
IN
= 3.465V or 2.625V
V
CC
= 3.465V or 2.625V, V
IN
= 0V
V
CC
= 3.465V or 2.625V, V
IN
= 0V
V
CCO_LVCMOS
= 3.465V
V
CCO_LVCMOS
= 2.625V
Output Low Voltage; NOTE 1
V
CCO_LVCMOS
= 3.465V or 2.625V
-5
-150
2.6
1.8
0.55
V
CC
= 3.3V
V
CC
= 2.5V
Minimum
2
1.7
-0.3
-0.3
100
150
5
Typical
Maximum
V
CC
+ 0.3
V
CC
+ 0.3
0.8
0.7
Units
V
V
V
V
mV
µA
µA
µA
µA
V
V
V
V
IL
V
HYS
I
IH
I
IL
Input
Low Current
V
OH
V
OL
Output High Voltage; NOTE 1
NOTE 1: Outputs terminated with 50 to V
CCO_LVCMOS
/2. See Parameter Measurement Information Section,
LVCMOS Output Load Test
Circuit Diagram.
Table 4D. LVPECL DC Characteristics,
V
CC
= V
CCO_LVPECL
= 3.3V ± 5%, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage:
NOTE 1
Output Low Voltage:
NOTE 1
Peak-to-Peak Output
Voltage Swing
Test Conditions
Minimum
V
CCO_LVPECL
– 1.4
V
CCO_LVPECL
– 2.1
0.6
Typical
Maximum
V
CCO_LVPECL
– 0.9
V
CCO_LVPECL
– 1.7
1.0
Units
V
V
V
NOTE 1: Outputs termination with 50 to V
CCO_LVPECL
– 2V.
Table 4E. LVPECL DC Characteristics,
V
CC
= V
CCO_LVPECL
= 2.5V ± 5%, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage: NOTE 1
Output Low Voltage: NOTE 1
Peak-to-Peak Output Voltage
Swing
Test Conditions
Minimum
V
CCO_LVPECL
– 1.4
V
CCO_LVPECL
– 2.1
0.4
Typical
Maximum
V
CCO_LVPECL
– 0.9
V
CCO_LVPECL
– 1.5
1.0
Units
V
V
V
NOTE 1: Outputs termination with 50 to V
CCO_LVPECL
– 2V.
ICS8534BMI-13 REVISION C AUGUST 9, 2013
5
©2013 Integrated Device Technology, Inc.
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