DATASHEET
ISL78419
Integrated Automotive TFT-LCD Power Supply Regulator
The ISL78419 is an integrated power management IC (PMIC) for
TFT-LCDs used in central display, rear seat entertainment and
virtual dashboards. The device integrates a boost converter for
generating AV
DD
, an LDO regulator for V
LOGIC
. V
ON
and V
OFF
are
generated by a charge pump driven by the switch node of the
boost converter. The ISL78419 also includes a V
ON
slice circuit,
reset function, and a high performance VCOM amplifier with a
Digitally Controlled Potentiometer (DCP) that is used as a VCOM
calibrator.
The AV
DD
boost converter features a 1.5A/0.18Ω
boost FET with
600kHz/1200kHz switching frequency.
The integrated logic LDO includes a 350mA FET for driving the low
voltage needed by external digital circuitry.
The gate pulse modulator can control the gate voltage up to 30V,
and both the rate and slew delay times are selectable.
The supply monitor generates a reset signal when the system is
powered down based on a user selected threshold level
(programming resistor).
The ISL78419 provides a digitally controlled VCOM output using
I
2
C interface. One VCOM amplifier is also integrated in the chip to
provide a fast slewing 150mA drive (sourcing or sinking). The
output of the VCOM is powered up with the voltage stored at the
last programmed 8-bit (internal) EEPROM setting.
The ISL78419 is rated to operate over the temperature range
of (-40°C to +105°C) and is qualified according to AEC-Q100.
FN8292
Rev 3.00
June 27, 2014
Features
• 2.5V to 5.5V input
• 1.5A, 0.18Ω integrated boost FET
• V
ON
/V
OFF
supplies generated by charge pumps driven by the
boost switch node
• LDO for V
LOGIC
channel
• 600kHz/1200kHz selectable switching frequency
• Integrated gate pulse modulator
• Reset signal generated by supply monitor
• Integrated VCOM amplifier
• DCP
- I
2
C serial interface, address: 0101000, MSB left
- Wiper position stored in 8-bit nonvolatile memory and
recalled on power-up
- Endurance, 1,000 data changes per bit
• UVLO, UVP, OVP, OCP, and OTP protection
• Pb-free (RoHS compliant)
• 28 Ld 4x5 QFN
• AEC-Q100 qualified
Applications
• Automotive TFT displays
- Central displays, rear seat entertainment and dashboards
Pin Configuration
EN
28
FB
PGND
CE
RE
VGH
VGHM
VFLK
VDPM
1
2
3
4
5
6
7
8
9
GPM_LO
ISL78419 (28 LD 4x5 QFN)
TOP VIEW
COMP
24
FREQ
VIN
SS
23
22
21
20
GND
THERMAL
PAD
19
18
17
16
L_IN
CD2
L_OUT
RESET
ADJ
VDIV
NEG
15 VOUT
10
AVDD
11
SCL
12
SDA
13
POS
14
RSET
LX
27
26
25
FN8292 Rev 3.00
June 27, 2014
Page 1 of 20
ISL78419
Table of Contents
Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Serial Interface Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Frequency Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soft-Start. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Capacitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inductor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Rectifier Diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linear Regulator (LDO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply Monitor Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Pulse Modulator Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VCOM Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DCP Memory Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
2
C Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protocol Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Write Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Communication with ISL78419. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Register Description: Access Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Register Description: IVR and WR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Initial VCOM Setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Start-up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
11
11
11
11
11
11
11
12
12
12
12
13
13
13
14
14
15
15
16
16
16
16
17
17
Layout Recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
FN8292 Rev 3.00
June 27, 2014
Page 2 of 20
ISL78419
Application Diagram
VIN
C1, 2
20µF
VIN
V
IN
C32
0.1µF
EN
SS
FREQ
SEQUENCER
AVDD BOOST
CONTROLLER
PGND
L1 10µH
LX
D1
SW
R1
73.2k
C4, 5, 6
30µF
AVDD
C7
AVDD
0.1µF
FB
COMP
R2 8.06k
R12 5.5k C20 15nF
D4
LDO VIN
VLOGIC
VLOGIC
C24
2.2µF
R18
3.92k
C25
1µF
L_IN
C11
0.1µF
LDO
AVDD
C8
47nF
VFLK
VGH
VDPM
C17
C14
1nF
100
pF
CE
RE
VGHM
GPM_LO
R7
83k
C18
0.47µF
R14 85k
OPEN
R15 115k
C26 1nF
R16
10k
VLOGIC
R5 100k
C28
0.1µF
D2
C9
1µF
D3
C15
1µF
R6 1k
SW
Q1
VOFF
Z1
C16
1µF
L_OUT
R17
8.25k
ADJ
C10
47nF
VON
C12
1µF
R9
10k
133k
R8
AVDD
C19
0.47µF
VCOM
SCL
SDA
RSET
POS
GPM
DCP
VGH GPM
R22 22k
R26 100k
V
IN
AVDD
VGH
AVDD
OUT
NEG
VCOM OP
VDIV
VOLTAGE
DETECTOR
CD2
RESET
RESET
THERMAL PAD
Pin Descriptions
PIN#
1
2
3
4
5
6
7
8
9
10
11
SYMBOL
FB
PGND
CE
RE
VGH
VGHM
VFLK
VDPM
GPM_LO
AVDD
SCL
DESCRIPTION
AV
DD
boost converter feedback. Connect to the center of a voltage divider between AV
DD
and GND to set the AV
DD
voltage.
Power ground
Gate Pulse Modulator Delay Control. Connect a capacitor between this pin and GND to set the delay time.
Gate Pulse Modulator Slew Control. Connect a resistor between this pin and GND to set the falling slew rate.
Gate Pulse Modulator High Voltage Input. Place a 0.1µF decoupling capacitor close to the VGH pin.
Gate Pulse Modulator Output for gate driver IC
Gate Pulse Modulator Control input from T
CON
Gate Pulse Modulator Enable. Connect a capacitor from VDPM to GND to set the delay time before GPM is enabled. A current
source charges the capacitor on VDPM.
Gate Pulse Modulator Low Voltage Input; place a 0.47µF decoupling capacitor close to the GPM_LO pin.
DCP and VCOM amplifier high voltage analog supply; place a 0.47µF decoupling capacitor close to the AVDD pin.
I
2
C compatible clock input
FN8292 Rev 3.00
June 27, 2014
Page 3 of 20
ISL78419
Pin Descriptions
PIN#
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SYMBOL
SDA
POS
RSET
VOUT
NEG
VDIV
ADJ
RESET
L_OUT
CD2
L_IN
SS
COMP
FREQ
VIN
LX
EN
(Continued)
DESCRIPTION
I
2
C compatible serial bidirectional data line
VCOM Amplifier Non-inverting input
DCP sink current adjustment pin; connect a resistor between this pin and GND to set the resolution of the DCP output voltage.
VCOM Amplifier output
VCOM Amplifier inverting input
Voltage detector threshold. Connect to the center of a resistive divider between V
IN
and GND.
VLOGIC LDO feedback. Connect to the center of a resistive divider between L_OUT and GND to set V
LOGIC
voltage for T
CON
.
Voltage detector reset output
LDO output. Connect at least one 1µF capacitor to GND for stable operation.
Voltage detector rising edge delay. Connect a capacitor between this pin and GND to set the rising edge delay.
LDO input. Connect a 1µF decoupling capacitor close to this pin.
Boost Converter Soft-Start. Connect a capacitor between this pin and GND to set the soft-start time.
Boost converter compensation pin. Connect a series resistor and capacitor between this pin and GND to optimize transient
response and stability.
Boost Converter frequency select; pull it to logic high to operate boost at 1.2MHz. Connect this pin to GND to operate boost at
600kHz.
IC input supply. Connect a 0.1µF decoupling capacitor close to this pin.
AV
DD
boost converter switching node
AV
DD
enable pin
Ordering Information
PART NUMBER
(Notes
Notes 1, 2, 3)
ISL78419ARZ
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL78419
For more information on MSL please see techbrief
TB363.
PART
MARKING
78419 ARZ
V
IN
RANGE
(V)
2.5 to 5.5
TEMP RANGE
(°C)
-40 to +105
PACKAGE
(Pb-free)
28 Ld 4x5 QFN
PKG.
DWG. #
L28.4x5A
FN8292 Rev 3.00
June 27, 2014
Page 4 of 20
ISL78419
Absolute Maximum Ratings
RE, VGHM, GPM_LO and VGH to GND . . . . . . . . . . . . . . . . . . . . -0.3 to +36V
LX, AVDD, POS, NEG, VOUT to GND . . . . . . . . . . . . . . . . . . . . . -0.3 to +18V
Voltage Between GND and PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.5V
All Other Pins to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0V
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 2kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 200V
Charged Device Model (Tested per AEC-Q100-11) . . . . . . . . . . . . . . . 1kV
Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
28 Ld 4x5 QFN Package (Notes
4, 5).
. . . .
38
4.5
Ambient Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C
Functional Junction Temperature . . . . . . . . . . . . . . . . . . . .-40°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Lead Temperature During Soldering . . . . . . . . . . . . . . . . . . . . . . . . +260°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see
TB493
Recommended Operating Conditions
Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5V to 5.5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379.
5. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
V
IN
= ENABLE = 3.3V, AVDD = 8V, VLDO = 2.5V, VON = 24V, VOFF = - 6V. Boldface limits apply across the
operating temperature range, -40°C to +105°C.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note
6)
TYP
(Note
7)
MAX
(Note
6)
UNITS
Electrical Specifications
GENERAL
VIN
I
S_DIS
I
S
I
ENABLE
V
IL
V
IH
R
IL
f
OSC
V
IN
Supply Voltage Range
V
IN
Supply Currents when Disabled
V
IN
Supply Currents
ENABLE Pin Current
V
IN
< UVLO
ENABLE = 3.3V, overdrive AV
DD
and V
GH
ENABLE = 0V
2.5
3.3
390
0.7
0
5.5
500
1.0
V
µA
mA
µA
LOGIC INPUT CHARACTERISTICS - ENABLE, FLK, SCL, SDA, FREQ
Low Voltage Threshold
High Voltage Threshold
Pull-Down Resistor
Enable, FLK, FREQ
1.75
0.85
1.25
1.65
0.65
V
V
MΩ
INTERNAL OSCILLATOR
Switching Frequencies
FREQ = low, T
A
= +25°C
FREQ = high, T
A
= +25°C
550
1100
600
1200
650
1300
kHz
kHz
AVDD BOOST REGULATOR
DAVDD/
DIOUT
DAVDD/
DVIN
V
FB
I
FB
r
DS(ON)
I
LIM
D
MAX
EFF
AVDD Load Regulation
AVDD Line Regulation
Feedback Voltage (V
FB
)
FB Input Bias Current
Switch ON-Resistance
Switch Current Limit
Max Duty Cycle
Freq = 1.2MHz
Freq = 1.2MHz, I
AVDD
= 100mA
Line Regulation
I
LDO
= 1mA, 3.0V < V
IN1
< 5.5V
T
A
= +25°C
1.125
80
180
1.5
90
91
50mA < I
LOAD
< 250mA
I
LOAD
= 150mA, 2.5V < V
IN
< 5.5V
I
LOAD
= 100mA, T
A
= +25°C
0.792
0.2
0.15
0.8
0.808
100
260
1.875
%
%
V
nA
mΩ
A
%
%
LDO REGULATOR
DV
LDO
/
DV
IN
1
mV/V
FN8292 Rev 3.00
June 27, 2014
Page 5 of 20
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