MC74VHC257
Quad 2-Channel Multiplexer
with 3-State Outputs
The MC74VHC257 is an advanced high speed CMOS quad
2−channel multiplexer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining CMOS low power dissipation.
It consists of four 2−input digital multiplexers with common select
(S) and enable (OE) inputs. When (OE) is held High, selection of data
is inhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed
to the corresponding Y outputs.
The inputs tolerate voltages up to 7 V, allowing the interface of 5 V
systems to 3 V systems.
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MARKING DIAGRAMS
16
9
•
•
•
•
•
•
•
•
•
•
•
•
High Speed: t
PD
= 4.1 ns (Typ) at V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 4.0
mA
(Max) at T
A
= 25°C
High Noise Immunity: V
NIH
= V
NIL
= 28% V
CC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: V
OLP
= 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: HBM > 2000 V; Machine Model > 200 V
Chip Complexity: FETs = 100; Equivalent Gates = 25
These Devices are Pb−Free and are RoHS Compliant
SO−16
D SUFFIX
CASE 751B
VHC257G
AWLYWW
1
8
16
9
TSSOP−16
DT SUFFIX
CASE 948F
VHC
257
ALYWG
G
1
8
16
9
EIAJ SO−16
M SUFFIX
CASE 966
VHC257
ALYWG
1
8
S
A0
B0
Y0
A1
B1
Y1
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
OE
A3
B3
Y3
A2
B2
Y2
A
L, WL
Y, YY
W, WW
G or
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Device
MC74VHC257DG
MC74VHC257DR2G
MC74VHC257DTG
Package
SO−16
SO−16
TSSOP−16
Shipping
48 Units/Rail
2500 Units/Reel
96 Units/Rail
Figure 1. Pin Assignment
MC74VHC257DTR2G TSSOP−16 2500 Units/Reel
MC74VHC257MG
EIAJSO−16
50 Units/Rail
©
Semiconductor Components Industries, LLC, 2011
May, 2011
−
Rev. 5
1
Publication Order Number:
MC74VHC257/D
MC74VHC257
OE
I
0a
I
1a
I
0b
I
1b
I
0c
I
1c
I
0d
I
1d
S
Z
a
Z
b
Z
c
Z
d
Figure 2. Expanded Logic Diagram
OE
S
A0
B0
A1
B1
A2
B2
A3
B3
15
1
2
3
5
6
11
10
14
13
EN
G1
1
1
MUX
4
7
9
12
Y0
Y1
Y2
Y3
Figure 3. IEC Logic Symbol
FUNCTION TABLE
Inputs
OE
S
Outputs
Y0
−
Y3
H
X
Z
L
L
A0
−A3
L
H
B0
−B3
A0
−
A3, B0
−
B3 = the levels
of the respective Data−Word
Inputs.
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND
v
(V
in
or V
out
)
v
V
CC
.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
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2
MC74VHC257
MAXIMUM RATINGS
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
STG
V
ESD
Positive DC Supply Voltage
Digital Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation in Still Air
Storage Temperature Range
ESD Withstand Voltage
Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
Above V
CC
and Below GND at 125°C (Note 4)
SOIC Package
TSSOP
SOIC Package
TSSOP
Parameter
Value
−0.5
to +7.0
−0.5
to +7.0
−0.5
to V
CC
+0.5
−20
$20
$25
$75
200
180
−65
to +150
>2000
>200
>2000
$300
143
164
Unit
V
V
V
mA
mA
mA
mA
mW
°C
V
I
LATCHUP
q
JA
Latchup Performance
mA
°C/W
Thermal Resistance, Junction−to−Ambient
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1 Tested to EIA/JESD22−A114−A
2 Tested to EIA/JESD22−A115−A
3 Tested to JESD22−C101−A
4 Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
V
OUT
T
A
t
r
, t
f
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature Range, all Package Types
Input Rise or Fall Time
V
CC
= 3.3 V + 0.3 V
V
CC
= 5.0 V + 0.5 V
Characteristics
Min
2.0
0
0
−55
0
Max
5.5
5.5
V
CC
125
100
20
Unit
V
V
V
°C
ns/V
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
NORMALIZED FAILURE RATE
Junction
Temperature
°C
80
90
100
110
120
130
140
Time, Hours
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
Time, Years
117.8
47.9
20.4
9.4
4.2
2.0
1.0
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 130
°
C
TJ = 120
°
C
TJ = 100
°
C
TJ = 110
°
C
TJ = 80
°
C
100
TIME, YEARS
TJ = 90
°
C
1
1
10
1000
Figure 4. Failure Rate vs. Time Junction Temperature
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3
MC74VHC257
DC CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
V
IH
Parameter
Minimum High−Level
Input Voltage
Maximum Low−Level
Input Voltage
Maximum High−Level
Output Voltage
V
IN
= V
IH
or V
IL
I
OH
=
−50
mA
V
IN
= V
IH
or V
IL
I
OH
=
−4
mA
I
OH
=
−8
mA
V
OL
Maximum Low−Level
Output Voltage
V
IN
= V
IH
or V
IL
I
OL
= 50
mA
V
IN
= V
IH
or V
IL
I
OH
= 4 mA
I
OH
= 8 mA
I
IN
I
OZ
I
CC
Input Leakage Current
Maximum 3−State
Leakage Current
Maximum Quiescent
Supply Current
(per package)
V
IN
= 5.5 V or GND
V
IN
= V
IH
or V
IL
V
OUT
= V
CC
or GND
V
IN
= V
CC
or GND
5.5
4.0
40.0
40.0
mA
Condition
(V)
2.0
3.0 to
5.5
2.0
3.0 to
5.5
2.0
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
0 to
5.5
5.5
1.9
2.9
4.4
2.58
3.94
0.0
0.0
0.0
0.1
0.1
0.1
0.36
0.36
±0.1
±0.25
2.0
3.0
4.5
Min
1.5
V
CCX
0.7
0.5
V
CCX
0.3
1.9
2.9
4.4
2.48
3.8
0.1
0.1
0.1
0.44
0.44
±1.0
±2.5
T
A
= 25°C
Typ
Max
T
A
≤
85°C
Min
1.5
V
CCX
0.7
Max
1.5
V
CCX
0.7
0.5
V
CCX
0.3
1.9
2.9
4.4
2.34
3.66
0.1
0.1
0.1
0.52
0.52
±1.0
±2.5
mA
mA
V
−55°C
≤
T
A
≤
125°C
Min
1.5
V
CCX
0.7
0.5
V
CCX
0.3
V
V
Max
Unit
V
V
IL
V
OH
ÎÎ Î Î Î ÎÎ Î Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
Î
Î Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î ÎÎ Î Î
Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
Î
Î Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î ÎÎ Î Î
Î
Î
Î Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Î
Î Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î ÎÎ Î Î
Î Î Î ÎÎ Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î ÎÎ Î Î
Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
T
A
= 25°C
Typ
5.8
8.3
3.6
5.1
7.0
9.5
4.0
5.5
6.7
9.2
3.6
5.1
T
A
=
≤
85°C
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
11.0
14.5
7.0
9.0
−55°C
≤
T
A
≤
125°C
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
11.0
14.5
7.0
9.0
Symbol
Parameter
Test Conditions
Min
Max
Unit
ns
t
PLH
,
t
PHL
Maximum Propagation
Delay
A or B to Y
Maximum Propagation
Delay
S to Y
V
CC
= 3.3
±
0.3 V
V
CC
= 5.0
±
0.5 V
V
CC
= 3.3
±
0.3 V
V
CC
= 5.0
±
0.5 V
V
CC
= 3.3
±
0.3 V
R
L
= 1 kW
V
CC
= 5.0
±
0.5 V
R
L
= 1 kW
V
CC
= 3.3
±
0.3 V
R
L
= 1 kW
V
CC
= 5.0
±
0.5 V
R
L
= 1 kW
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
9.3
12.8
5.9
7.9
t
PLH
,
t
PHL
11.0
14.5
6.8
8.8
13.0
16.5
13.0
16.5
ns
8.0
10.0
8.0
10.0
t
PZL
,
t
PZH
Maximum Output Enable
Time
OE to Y
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
C
L
= 50 pF
C
L
= 50 pF
10.5
14.0
6.8
8.8
12.5
16.0
12.5
16.0
ns
8.0
10.0
8.0
10.0
t
PLZ
,
t
PHZ
Maximum Output Disable
Time
OE to Y
Maximum Input
Capacitance
12.0
5.7
4
15.0
13.0
10
16.0
14.0
10
17.5
15.0
10
ns
C
IN
pF
Typical @ 25°C, V
CC
= 5.0V
20
C
PD
Power Dissipation Capacitance (Note 5)
pF
5. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
. C
PD
is used to determine the no−load dynamic
power consumption; P
D
= C
PD
V
CC2
f
in
+ I
CC
V
CC
.
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0ns)
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4
MC74VHC257
NOISE CHARACTERISTICS
(Input t
r
= t
f
= 3.0 ns, C
L
= 50 pF, V
CC
= 5.0 V)
T
A
= 25°C
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
Characteristic
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
OE
V
CC
A, B or S
50%
t
PLH
Y
50% V
CC
Y
t
PHL
GND
Y
t
PZL
50% V
CC
t
PZH
50% V
CC
t
PHZ
t
PLZ
Typ
0.3
−
0.3
Max
0.8
−
0.8
3.5
1.5
V
CC
50%
GND
HIGH
IMPEDANCE
V
OL
+ 0.3V
V
OH
- 0.3V
HIGH
IMPEDANCE
Unit
V
V
V
V
Figure 5. Switching Waveform
Figure 6. Switching Waveform
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
1 kΩ
CONNECT TO V
CC
WHEN
TESTING t
PLZ
AND t
PZL.
CONNECT TO GND WHEN
TESTING t
PHZ
AND t
PZH.
C
L
*
DEVICE
UNDER
TEST
C
L
*
*Includes all probe and jig capacitance
*Includes all probe and jig capacitance
Figure 7. Test Circuit
Figure 8. Test Circuit
INPUT
Figure 9. Input Equivalent Circuit
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