NXP Semiconductors
Data Sheet: Advance Information
Document Number: MC50XS4200
Rev. 4.0, 5/2018
Dual
24 V,
50 mOhm high-side switch
The 50XS4200 device is part of a 24 V dual high-side switch product family with
integrated control, and a high number of protective and diagnostic functions. It
is designed for truck and bus applications. The low R
DS(on)
channels (<50 mΩ)
can control different load types; bulbs, solenoids, or DC motors. Control, device
configuration, and diagnostics are performed through a 16-bit serial peripheral
interface (SPI), allowing easy integration into existing applications. This device
is powered by SMARTMOS technology.
Both channels can be controlled individually by external/internal clock signals,
or by direct inputs. Using the internal clock allows fully autonomous device
operation. Programmable output voltage slew rates (individually programmable)
helps improve electromagnetic compatibility (EMC) performance. To avoid
shutting off the device upon inrush current, while still being able to closely track
the load current, a dynamic overcurrent threshold profile is featured. Switching
current of each channel can be sensed with a programmable sensing ratio.
Whenever communication with the external microcontroller is lost, the device
enters a Fail-safe operation mode, but remains operational, controllable, and
protected.
Features
•
•
•
•
•
•
•
•
•
Two fully-protected 50 mΩ (at 25 °C) high-side switches
Up to 1.65 A steady state current per channel
Separate bulb and DC motor latched overcurrent handling
Individually programmable internal/external PWM clock signals
Overcurrent, short-circuit, and overtemperature protection with
programmable autoretry functions
Accurate temperature and current sensing
Open load detection (channel in OFF and ON state), also for LED
applications (7.0 mA typ.)
Normal operating range: 8.0 to 36 V, extended range: 6.0 to 58 V
3.3 V and 5.0 V compatible 16-bit SPI port for device control, configuration
and diagnostics at rates up to 8.0 MHz
V
DD
V
DD
50XS4200
HIGH-SIDE SWITCH
EK SUFFIX (PB-FREE)
98ASA00368D
32 PIN SOIC (10 mm X 11 mm)
Applications
• Truck, bus and 24 V transportation systems
• Resistive, capacitive, and inductive loads
V
PWR
50XS4200
I/O
I/O
SCLK
CSB
SI
MCU
I/O
SO
I/O
I/O
VDD
VPWR
CLOCK
FSB
SCLK
HS0
CSB
SO
RSTB
SI
HS1
IN0
IN1
CONF0
CONF1
FSOB
SYNC
CSNS GND
LOAD
M
LOAD
GND
I/O
A/D
A/D
Figure 1. Simplified application diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© NXP B.V. 2018.
Table of Contents
1
2
3
4
Orderable parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.2 Static electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.3 Dynamic electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.4 Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.2 Pin assignment and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3 Functional internal block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Functional device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.1 Operation and operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.3 Logic commands and SPI registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Typical applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
8.1 Package mechanical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
5
6
7
8
9
50XS4200
NXP Semiconductors
2
1
Orderable parts
Table 1. Orderable part variations
Part number
MC50XS4200BEK
(1)
Temperature (T
A
)
-40 °C to 125 °C
Package
32 SOIC-EP
Notes
1. To order parts in tape and reel, add the R2 suffix to the part number.
50XS4200
3
NXP Semiconductors
2
Internal block diagram
VDD
VPWR
I
UP
CSB
SCLK
I
DWN
SO
SI
RSTB
FSB
IN0
IN1
FSOB
CONF0
CONF1
R
DWN
I
DWN
V
DD
Failure
Detection
Internal
Regulator
V
REG
POR
Over/Undervoltage
Protections
Charge
Pump
Drain/Gate
Clamp
Selectable Slew Rate
Gate Driver
Selectable Overcurrent
Detection
Severe Short-circuit
Detection
Control
HS0
Logic
Short-circuit to
VPWR detec.
Overtemperature
Detect.
Open Load
Detect
HS0
I
UP
V
REG
Calibratable
Oscillator *
HS1
HS1
CLOCK
I
DWN
PWM
Module
*
Temperature
Feedback
Output
Current Sense
Analog MUX
Overtemperature
Prewarning
*blocks marked in grey have been implemented
independently for each of both channels
GND
CSNS
SYNC
Figure 2. Internal block diagram
50XS4200
NXP Semiconductors
4
3
Pin assignment
Transparent Top View
CLOCK
RSTB
CSB
SCLK
SI
VDD
SO
GND
FSB
NC
NC
HS1
HS1
HS1
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
CONF1
CONF0
FSOB
IN1
IN0
CSNS
SYNC
GND
NC
NC
NC
HS0
HS0
HS0
NC
NC
VPWR
33
Figure 3. Device pin assignments
The function of each pin is described in the section
Functional description.
Table 2. 50XS4200 pin description
Pin
number
1
Pin name
CLOCK
Function
Input
Formal name
PWM Clock
Definition
The clock input gives the time-base when the device is operated in external clock/internal
PWM mode. This pin has an internal pull-down current source.
This input pin is used to initialize the device’s configuration - and fault registers. Reset
puts the device in Sleep mode (low current consumption) provided it is not stimulated by
direct input signals. This pin is connected to GND by an internal pull-down resistor.
This input pin is connected to the SPI chip-select output of an external microcontroller.
CSB is internally pulled up to V
DD
by a current source I
UP
.
This input pin is to be connected to an external SPI Clock signal. The SCLK pin is
internally connected to a pull-down current source I
DWN
.
This input pin receives the SPI input data from an external device (microcontroller or
another extreme switch device in case of daisy-chaining). The SI pin is internally
connected to a pull-down current source I
DWN
.
This is the positive supply pin of the SPI interface.
This output pin transmits SPI data to an external device (external microcontroller or the
SI pin of the next SPI device in case of daisy-chaining). The pin doesn’t require external
pull-up or pull-down resistors, but a series resistor is recommended to limit current
consumption in case of GND disconnection.
These pins are the ground for the logic and analog circuitries of the device. For ESD and
electrical parameter accuracy purpose, the ground pins must be shorted in the board.
This open drain output pin (external pull-up resistor to V
DD
required) is set when the
device enters Fault mode (see
Fault mode).
These pins may not be connected.
2
RSTB
Input
Reset
Chip Select
(Active Low)
Serial Clock
3
4
CSB
SCLK
Input
Input
5
6
SI
VDD
Input
Power
Serial Input
Digital Drain Voltage
7
SO
Output
Serial Output
8, 25
9
10, 11, 15,
16, 17, 18,
22, 23, 24
12, 13, 14,
19, 20, 21
GND
FSB
Ground
Output
Ground
Fault Status
(Active Low)
Not connected
NC
HS1
HS0
N/A
Output
Power Switch Outputs Output pins of the switches, to be connected to the load.
50XS4200
5
NXP Semiconductors
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