IN74LVU04
H
EX
I
NVERTER
The 74LVU04 is a low-voltage, Si-gate CMOS device and is
pin compatible with the 74HCU04.
The 74LVU04 is a general purpose hex inverter. Each of the
six
inverters is a single stage with unbuffered outputs.
•
•
•
•
Wide Operating Voltage: 1.0÷5.5 V
Optimized for Low Voltage applications: 1.0÷3.6 V
Accepts TTL input levels between V
CC
=2.7 V and V
CC
=3.6 V
Low Input Current
14
1
14
1
D SUFFIX
SOIC
N SUFFIX
PLASTIC
ORDERING INFORMATION
IN74LVU04N
Plastic
IN74LVU04D
SOIC
IZ74LVU04
Chip
T
A
= -40° ÷ 125° C for all
packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 14 =V
CC
PIN 7 = GND
FUNCTION TABLE
Input
Output
A
Y
L
H
H
L
1
IN74LVU04
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
DC supply voltage (Referenced to GND)
V
-0.5
÷
+7.0
1
I
IK
*
DC input diode current
mA
±20
2
I
OK
*
DC output diode current
mA
±50
3
I
O
*
DC output source or sink current
mA
±25
-bus driver outputs
I
CC
DC
V
CC
current
for
types
with
mA
±50
- bus driver outputs
I
GND
DC GND current for types with
mA
±50
- bus driver outputs
750
mW
P
D
Power dissipation per package, plastic
500
DIP+
SOIC
package+
Tstg
Storage temperature
-65
÷
+150
°C
260
T
L
Lead temperature, 1.5 mm from Case for
°C
10 seconds (Plastic DIP ), 0.3 mm (SOIC
Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 12 mW/°C from 70° to 125°C
SOIC Package: : - 8 mW/°C from 70° to 125°C
1
* : V
I
<
-0.5V or V
I
>
V
CC
+0.5V
*
2
: Vo
<
-0.5V or Vo
>
V
CC
+0.5V
*
3
: -0.5V
<
Vo
<
V
CC
+0.5V
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to
1.0
5.5
V
GND)
V
IN
, V
OUT
DC Input Voltage, Output Voltage
0
V
CC
V
(Referenced to GND)
T
A
Operating Temperature, All Package
-40
+125
°C
Types
ns
500
t
r
, t
f
Input Rise and Fall 1.0 V≤V
CC
<2.0 V
0
200
Time
0
2.0 V≤V
CC
<2.7 V
100
0
2.7 V≤V
CC
<3.6 V
50
0
3.6 V≤V
CC
≤5.5
V
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, V
IN
and
V
OUT
should be constrained to the range GND≤(V
IN
or V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
V
CC
). Unused outputs must be left open.
2
嵌入式系统
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