TECHNICAL DATA
IN74LV86
Quad 2-Input Exclusive OR Gate
The 74LV86 is a low–voltage Si–gate CMOS device and is pin
and
function compatible with the 74HC/HCT86.
The 74LV86 provides the 2-input EXCLUSIVE-OR function.
•
Output voltage levels are compatible with input levels of
CMOS, NMOS and TTL IC
S
•
Supply voltage range: 1.2 to 5.5 V
•
Low input current: 1.0
µА;
0.1
µА
at
Т
= 25
°С
•
Output current: 6 mA at Vcc = 3.0 V; 12 mA at Vcc = 4.5V
•
High Noise Immunity Characteristic of CMOS Devices
N SUFFIX
PLASTIC
14
1
14
D SUFFIX
SOIC
1
ORDERING INFORMATION
IN74LV86N Plastic
IN74LV86D SOIC
T
A
= -40° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
PIN 16=V
CC
PIN 08 = GND
An
L
L
H
H
H= high level
L = low level
Bn
H
L
L
H
Outputs
Yn
H
L
H
L
1
IN74LV86
MAXIMUM RATINGS
*
Symbol
V
CC
I
IK
*
1
I
OK
*
2
I
O
*
3
I
CC
I
GND
P
D
DC supply voltage
Input diode current
Output diode current
Output source or sink current
V
CC
current
GND current
Power dissipation per package: *
4
Plastic DIP
SO
Storage Temperature
Lead Temperature, 1.5 mm (Plastic DIP Package), 0.3 mm
(SO Package) from Case for 4 Seconds
Parameter
Value
-0.5 to +5.0
±20
±50
±25
±50
±50
750
500
-65 to +150
260
°C
°C
Unit
V
mA
mA
mA
mA
mA
mW
Tstg
T
L
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
*
1
V
I
< -0.5 V or V
I
> V
CC
+ 0.5 V.
*
2
V
O
< -0.5 V or V
O
> V
CC
+ 0.5 V.
*
3
-0.5 V < V
O
< V
CC
+ 0.5 V.
*
4
Derating - Plastic DIP: - 12 mW/°C from 70° to 125°C
SO Package: : - 8 mW/°C from 70° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
A
t
r
, t
f
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature, All Package Types
Input Rise and Fall Time (Figure 1)
1.0
В
≤V
CC
<2.0
В
2.0
В
≤V
CC
<2.7
В
2.7
В
≤V
CC
<3.6
В
3.6
В
≤V
CC
≤5.5
В
Parameter
Min
1.2
0
0
-40
0
0
0
0
Max
5.5
V
CC
V
CC
+125
500
200
100
50
Unit
V
V
V
°C
ns/V
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND≤(V
IN
or
V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
2
IN74LV86
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Test
Symbol
V
IH
Parameter
HIGH level input
voltage
conditions
V
CC
V
1.2
2.0
2.7
3.0
3.6
4.5
5.5
1.2
2.0
2.7
3.0
3.6
4.5
5.5
V
I
= V
IH
or V
IL
I
O
= -100
µА
1.2
2.0
2.7
3.0
3.6
4.5
5.5
3.0
4.5
1.2
2.0
2.7
3.0
3.6
4.5
5.5
3.0
4.5
5.5
5.5
2.7
3.6
-40°C to 25°C
min
0.9
1.4
2.0
2.0
2.0
3.15
3.85
-
-
-
-
-
-
-
1.05
1.85
2.55
2.85
3.45
4.35
5.35
2.48
3.70
-
-
-
-
-
-
-
-
-
-
-
-
max
-
-
-
-
-
-
-
0.3
0.6
0.8
0.8
0.8
1.35
1.65
-
-
-
-
-
-
-
-
-
0.15
0.15
0.15
0.15
0.15
0.15
0.15
0.33
0.40
±0.1
4.0
0.2
0.2
Guaranteed Limit
85°C
min
0.9
1.4
2.0
2.0
2.0
3.15
3.85
-
-
-
-
-
-
-
1.0
1.8
2.5
2.8
3.4
4.3
5.3
2.34
3.60
-
-
-
-
-
-
-
-
-
-
-
-
max
-
-
-
-
-
-
-
0.3
0.6
0.8
0.8
0.8
1.35
1.65
-
-
-
-
-
-
-
-
-
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.40
0.55
±1.0
20
0.5
0.5
125°C
min
0.9
1.4
2.0
2.0
2.0
3.15
3.85
-
-
-
-
-
-
-
1.0
1.8
2.5
2.8
3.4
4.3
5.3
2.20
3.50
-
-
-
-
-
-
-
-
-
-
-
-
max
-
-
-
-
-
-
-
0.3
0.6
0.8
0.8
0.8
1.35
1.65
-
-
-
-
-
-
-
-
-
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.50
0.65
±1.0
40
0.85
0.85
V
Unit
V
IL
LOW level input
voltage
V
V
OH
HIGH level output
voltage
V
V
I
= V
IH
or V
IL
I
O
= -6 mА
V
I
= V
IH
or V
IL
I
O
= -12 mА
V
OL
LOW level output
voltage
V
I
= V
IH
or V
IL
I
O
= 100
µА
V
V
V
V
I
= V
IH
or V
IL
I
O
= 6 mА
V
I
= V
IH
or V
IL
I
O
= 12 mА
I
I
I
CC
I
CC1
Input current
Supply current
Additional
quiescent supply
current per input
V
I
= V
CC
or 0 V
V
I
=V
CC
or 0 V
I
O
= 0
µА
V
I
=V
CC
–
0.6 V
V
V
µА
µА
mA
3
IN74LV86
AC ELECTRICAL CHARACTERISTICS
(C
L
=50 pF, R
L
= 1 kΩ, t
r
=t
f
=2.5 ns)
Test
Symbol
Parameter
conditions
V
I
= 0 V or V
CC
Figure 1, 2
V
CC
V
1.2
2.0
2.7
3.0
4.5
5.0
5.5
min
t
PHL,
t
PLH
Propagation delay ,
An ,Bn, to Yn
-
-
-
-
-
-
-
Guaranteed Limit
-40°C to 25°C
max
140
24
19
15
13
7.0
60
-
-
-
-
-
-
-
85°C
min
max
150
32
24
19
16
-
-
-
-
-
-
-
-
-
125°C
min
max
180
41
30
24
20
-
-
ns
Unit
C
I
C
PD
Input capacitance
Power dissipation
capacitance (per gate)
Т
A
= 25°C
V
I
= 0 V or V
CC
T
A
= 25°C
pF
pF
tr
INPUT
A OR B
90%
10%
V
M
(1)
tf
V
1
(2)
GND
t
PHL
V
OH
V
OL
t
PLH
OUTPUT Y
V
M
(1)
Figure 1. Switching Waveforms
Note:
(1)
(2)
V
M
= 1.5 V at V
CC
= 2.7 V
V
M
= 0.5
⋅V
CC
at V
CC
=1.2 V, 2.0 V, 3.0 V, 4.5 V
V
1
= V
CC
at V
CC
=1.2 V, 2.0 V, 2.7 V, 4.5 V
V
1
= 2.7 V at V
CC
= 3.0 V
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
R
L
C
L
*
* Includes all probe and jig capacitance
Figure 4. Test Circuit
4
IN74LV86
N SUFFIX PLASTIC DIP
(MS - 001AA)
A
14
8
B
1
7
Dimension, mm
Symbol
A
B
C
MIN
18.67
6.1
MAX
19.69
7.11
5.33
0.36
1.14
2.54
7.62
0°
2.92
7.62
0.2
0.38
10°
3.81
8.26
0.36
0.56
1.78
F
L
D
F
C
-T-
SEATING
N
G
D
0.25 (0.010) M T
K
PLANE
G
H
H
J
M
J
K
L
M
N
NOTES:
1. Dimensions “A”, “B” do not include mold flash or protrusions.
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
D SUFFIX SOIC
(MS - 012AB)
Dimension, mm
8
A
14
Symbol
A
MIN
8.55
3.8
1.35
0.33
0.4
1.27
5.27
0°
0.1
0.19
5.8
0.25
MAX
8.75
4
1.75
0.51
1.27
H
B
P
B
C
1
G
7
C
R x 45
D
F
G
-T-
D
0.25 (0.010) M T C M
K
SEATING
PLANE
H
J
F
M
J
K
M
P
R
8°
0.25
0.25
6.2
0.5
NOTES:
1. Dimensions A and B do not include mold flash or protrusion.
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side
for A; for B
‑
0.25 mm (0.010) per side.
5
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