IN74LV573
O
CTAL
D-T
YPE
T
RANSPARENT
L
ATCH
(3-S
TATE
)
By pinning IN74LV573 are compatible with IN74HC573A and
IN74HCT573A series. Input voltage levels are compatible with
stadard CMOS levels.
Output voltage levels are compatible with input levels of CMOS,
NMOS and TTL IC
S
Voltage supply range from 1.2 to 5.5 V
LOW input current: 1.0
µА;
0.1
µА
at
Т
= 25
°С
Output current 8 mА
Latch current: not less than150 mА at
Т
= 125
°С
ESD acceptable value: not less than 2000 V as per HBM and
not less than 200 V as per MM
ORDERING INFORMATION
IN74LV573N Plastic DIP
IN74LV573D SOIC
T
A
= -40° to 125° C
for all packages
•
•
•
•
•
•
FUNCTION TABLE
Inputs
OE
LE
L
H
L
H
L
L
D
H
L
X
H
X
X
H -HIGH voltage level
L - LOW voltage level
X - don’t care
Z - High impedance state
Outputs
Q
H
L
no
change
Z
PIN ASSIGNMENT
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
LE
1
IN74LV573
ABSOLUTE MAXIMUM RATINGS
Symb
Parameter
ol
Vcc
Supply voltage
Iik,
Input diode current
Iok
Io
Icc
I
GND
Tstg
P
D
Output diode current
Output current bus drivers
DC Vcc or GND current for
types
bus driver outputs
GND current
Storage temperature range
Power dissipation per package:
DIP
SO
Rating
-0.5 to +7.0
±20
±50
±35
±70
±50
-65 to +150
750
500
Uni
t
V
mA
mA
mA
mA
mА
о
С
mW
Conditions
V
I
<-0.5 V
V
I
>Vcc>+0.5 V
V
0
<-0.5 V
V
I
>Vcc>+0.5 V
-0.5 V<Vo<Vcc+0.5 V
or
or
Notes:
Power dissipation value decreases for:
DIP - 12 mW°C the range from 70 to 125°С
SO - 8 mW°C the range from 70 to 125°С
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Vcc
Supply voltage
1.0
VI
Input voltage
0
Vо
Output voltage
0
T
Operating temperature range
-40
t
r
,t
f
Input rise and fall times
Vcc= 1.0
÷
2.0 V
Vcc= 2.0
÷
2.7 V
Vcc= 2.7
÷
3.6 V
Vcc= 3.6
÷
5.5 V
- The IC function down to Vсс = 1.0 V (input levels - V
IL
=0 V, V
IH
=Vcc); DC characterisics
are guaranteed at Vcc=1.2
÷
5.5 V.
Max
5.5
Vcc
Vcc
+125
500
200
100
50
Unit
V
V
V
o
C
ns/V
Conditions
2
FPGA/CPLD
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