IN74HC4046A
P
HASE
-L
OCKED
L
OOP
High-Performance Silicon-Gate CMOS
The device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALSTTL outputs.
The IN74HC4046A phase-locked loop contains three phase
comparators, a voltage-controlled oscillator (VCO) and unity gain op-
amp DEM
OUT
. The comparators have two common signal inputs,
COMP
IN
, and SIG
IN
. Input SIG
IN
and COMP
IN
can be used directly
coupled to large voltage signals, or indirectly coupled (with a series
capacitor to small voltage signals). The self-bias circuit adjusts small
voltage signals in the linear region of the amplifier. Phase comparator 1
(an exclusive OR gate) provides a digital error signal PC1
OUT
and
maintains 90 degrees phase shift at the center frequency between
SIG
IN
and COMP
IN
signals (both at 50% duty cycle). Phase comparator
2 (with leading-edge sensing logic) provides digital error signals
PC2
OUT
and PCP
OUT
and maintains a 0 degree phase shift between
SIG
IN
and COMP
IN
signals (duty cycle is immaterial). The linear VCO
produces an output signal VCO
OUT
whose frequency is determined by
the voltage of input VCO
IN
signal and the capacitor and resistors
connected to pins C1A, C1B, R1 and R2. The unity gain op-amp
output DEM
OUT
with an external resistor is used where the VCO
IN
signal is needed but no loading can be tolerated. The inhibit
input, when high, disables the VCO and all on-amps to minimize
standby power consumption.
Applications include FM and FSK modulation and
demodulation, frequency synthesis and multiplication, frequency
discrimination, tone decoding, data synchronization and
conditioning, voltage-to-frequency conversion and motor speed
control.
Low Power Consumption Characteristic of CMOS Device
Operating Speeds Similary to LS/ALSTTL
Wide Operating Voltage Range: 3.0 to 6.0 V
Low Input Current: 1.0
µA
Maximum (except SIG
IN
and COMP
IN
)
Low Quiescent Current: 80
µA
Maximum (VCO disabled)
High Noise Immunity Characteristic of CMOS Devices
Diode Protection on all Inputs
Pin No.
Symbol
Name and Function
1
PCP
OUT
Phase Comparator Pulse Output
2
PC1
OUT
Phase Comparator 1 Output
3
COMP
IN
Comparator Input
4
VCO
OUT
VCO Output
5
INH
Inhibit Input
6
C1A
Capacitor C1 Connection A
7
C1B
Capacitor C1 Connection B
8
GND
Ground (0 V) V
SS
9
VCO
IN
VCO Input
10
DEM
OUT
Demodulator Output
11
R1
Resistor R1 Connection
12
R2
Resistor R2 Connection
13
PC2
OUT
Phase Comparator 2 Output
14
SIG
IN
Signal Input
15
PC3
OUT
Phase Comparator 3 Output
16
V
CC
Positive Supply Voltage
ORDERING INFORMATION
IN74HC4046AN Plastic
IN74HC4046AD SOIC
T
A
= -55° to 125° C for all
packages
PIN ASSIGNMENT
•
•
•
•
•
•
•
1
tector
2.
For
instance,
a
signal??2
ti
IN74HC4046A
MAXIMUM RATINGS
*
Symbol
Parameter
Value
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
IN
DC Input Voltage (Referenced to GND)
-1.5 to V
CC
+1.5
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
I
IN
DC Input Current, per Pin
±20
I
OUT
DC Output Current, per Pin
±25
I
CC
DC Supply Current, V
CC
and GND Pins
±50
P
D
Power Dissipation in Still Air, Plastic
DIP+
750
SOIC Package+
500
Tstg
Storage Temperature
-65 to +150
T
L
Lead Temperature, 1 mm from Case for 10
260
Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V
CC
DC Supply Voltage (Referenced to GND) VCO only
V
CC
DC Supply Voltage (Referenced to GND) NON-VCO
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to GND)
T
A
Operating Temperature, All Package Types
t
r
, t
f
Input Rise and Fall Time (Figure 1)
V
CC
=2.0
V
CC
=4.5
V
CC
=6.0 V
Min
3.0
2.0
0
-55
0
0
0
Max
6.0
6.0
V
CC
+125
1000
500
400
Unit
V
V
V
mA
mA
mA
mW
°C
°C
V
V
Unit
V
V
V
°C
ns
This device contains protection circuitry to guard against damage due to high static voltages or
electric fields. However, precautions must be taken to avoid applications of any voltage higher than
maximum rated voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be
constrained to the range GND≤(V
IN
or V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
).
Unused outputs must be left open.
2
IN74HC4046A
[Phase Comparator Section]
DC ELECTRICAL CHARACTERISTICS(Voltages
Referenced to GND)
V
CC
Guaranteed Limit
Symbol Parameter
Test Conditions
V
25
°C ≤85 ≤125
to
°C
°C
-55°C
V
IH
Minimum High-
V
OUT
= 0.1 V or V
CC
-0.1 V
2.0
1.5
1.5
1.5
Level Input Voltage
I
OUT
≤
20
µA
4.5
3.15
3.1
3.15
DC Coupled
6.0
4.2
5
4.2
SIG
IN
, COMP
IN
4.2
V
IL
Maximum Low -
V
OUT
=0.1 V or V
CC
-0.1 V
2.0
0.5
0.5
0.5
Level Input Voltage
I
OUT
≤
20
µA
4.5
1.35
1.3
1.35
DC Coupled
6.0
1.8
5
1.8
SIG
IN
, COMP
IN
1.8
V
OH
Minimum High-
V
IN
=V
IH
or V
IL
2.0
1.9
1.9
1.9
Level Output
4.5
4.4
4.4
4.4
I
OUT
≤
20
µA
Voltage PCP
OUT
,
6.0
5.9
5.9
5.9
PCn
OUT
V
IN
= V
IH
or V
IL
4.5
3.98
3.8
3.7
I
OUT
≤
4.0 mA
6.0
5.48
4
5.2
I
OUT
≤
5.2 mA
5.3
4
V
OL
Maximum Low-
V
IN
=V
IH
or V
IL
2.0
0.1
0.1
0.1
Level Output
4.5
0.1
0.1
0.1
I
OUT
≤
20
µA
Voltage Q
a
-Q
h
6.0
0.1
0.1
0.1
PCP
OUT
, PCn
OUT
V
IN
= V
IH
or V
IL
4.5
0.26
0.3
0.4
I
OUT
≤
4.0 mA
6.0
0.26
3
0.4
I
OUT
≤
5.2 mA
0.3
3
I
IN
Maximum Input
2.0
V
IN
=V
CC
or GND
±5.0
±4.
±3.0
Leakage Current
3.0
0
±11.
±7.0
SIG
IN
, COMP
IN
4.5
0
±9.
±18.0
6.0
0
±27.
±30.0
0
±23
.0
±45.
0
±38
.0
I
OZ
Maximum Three-
Output in High-
6.0
±0.5
±5.
±10
State Leakage
Impedance State
0
Current PC2
OUT
V
IN
= V
IL
or V
IH
V
OUT
=V
CC
or GND
I
CC
Maximum
V
IN
=V
CC
or GND
6.0
4.0
40
160
Quiescent Supply
I
OUT
=0µA
Current
(per Package)
(VCO disabled)
Pins 3,5 and 14 at
V
CC
Pin 9 at GND; Input
Leacage at
Pin 3 and 14 to be
excluded
Unit
V
V
V
V
µA
µA
µA
3
IN74HC4046A
[Phase Comparator Section]
AC ELECTRICAL CHARACTERISTICS(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
Guaranteed Limit
Symbol
Parameter
V 25
°C
to
≤85°C ≤125°C
Unit
-55°C
t
PLH
, t
PHL
Maximum Propagation Delay, SIG
IN
/COMP
IN
2.0
175
220
265
ns
to PC1
OUT
(Figure 1)
4.5
35
44
53
6.0
30
37
45
t
PLH
, t
PHL
Maximum Propagation Delay, SIG
IN
/COMP
IN
2.0
340
425
510
ns
to PCP
OUT
(Figure 1)
4.5
68
85
102
6.0
58
72
87
t
PLH
, t
PHL
Maximum Propagation Delay , SIG
IN
/COMP
IN
2.0
270
340
405
ns
to PC3
OUT
(Figure 1)
4.5
54
68
81
6.0
46
58
69
t
PLZ
, t
PHZ
Maximum Propagation Delay , SIG
IN
/COMP
IN
2.0
200
250
300
ns
Output
Disable
Time
to
PC2
OUT
4.5
40
50
60
(Figures 2 and 3)
6.0
34
43
51
t
PZL
, t
PZH
Maximum Propagation Delay , SIG
IN
/COMP
IN
2.0
230
290
345
ns
Output
Enable
Time
to
PC2
OUT
4.5
46
58
69
(Figures 2 and 3)
6.0
39
49
59
t
TLH
, t
THL
Maximum Output Transition Time (Figure 1)
2.0
75
95
110
ns
4.5
15
19
22
6.0
13
16
19
[VCO Section]
DC ELECTRICAL CHARACTERISTICS(Voltages
Referenced to GND)
V
CC
Guaranteed Limit
Symbo Parameter
Test Conditions
V
25
°C
to-55°C
≤85°C
≤125°C
Unit
l
V
IH
Minimum High-Level V
OUT
= 0.1 V or
3.0
2.1
2.1
2.1
V
Input Voltage INH
V
CC
-0.1 V
4.5
3.15
3.15
3.15
6.0
4.2
4.2
4.2
I
OUT
≤
20
µA
V
IL
Maximum Low -
V
OUT
=0.1 V or
3.0
0.90
0.90
0.90
V
Level Input Voltage
V
CC
-0.1 V
4.5
1.35
1.35
1.35
INH
6.0
1.8
1.8
1.8
I
OUT
≤
20
µA
V
OH
Minimum High-Level V
IN
=V
IH
or V
IL
3.0
1.9
1.9
1.9
V
Output Voltage
4.5
4.4
4.4
4.4
I
OUT
≤
20
µA
VCO
OUT
6.0
5.9
5.9
5.9
V
IN
= V
IH
or V
IL
4.5
3.98
3.84
3.7
I
OUT
≤
4.0 mA
6.0
5.48
5.34
5.2
I
OUT
≤
5.2 mA
V
OL
Maximum Low-Level V
IN
=V
IH
or V
IL
3.0
0.1
0.1
0.1
V
Output Voltage
4.5
0.1
0.1
0.1
I
OUT
≤
20
µA
VCO
OUT
6.0
0.1
0.1
0.1
V
IN
= V
IH
or V
IL
4.5
0.26
0.33
0.4
I
OUT
≤
4.0 mA
6.0
0.26
0.33
0.4
I
OUT
≤
5.2 mA
(continued)
4
IN74HC4046A
[VCO Section]
DC ELECTRICAL CHARACTERISTICS(Voltages
Referenced to GND) - continued
V
CC
Guaranteed Limit
Symbo
Parameter
Test Conditions
V
Unit
25
°C
to
≤85°C
≤125°C
l
-55°C
I
IN
Maximum
Input V
IN
=V
cc
or GND 6.0
0.1
1.0
1.0
µA
Leakage
Current
INH, VCO
IN
Min Max Min Max Min Max
V
VCOIN
Operating Voltage INH= V
IL
3.0 0.1 1.0 0.1 1.0 0.1 1.0
V
Range at VCO
IN
4.5 0.1 2.5 0.1 2.5 0.1 2.5
6.0 0.1 4.0 0.1 4.0 0.1 4.0
over
the
range
specified for R1; For
linearity
see
Fig.13A,
Parallel
value of R1 and R2
should be >2.7 kΩ
R1
Resistor Range
3.0 3.0 300 3.0 300 3.0 300 kΩ
4.5 3.0 300 3.0 300 3.0 300
6.0 3.0 300 3.0 300 3.0 300
R2
3.0 3.0 300 3.0 300 3.0 300
4.5 3.0 300 3.0 300 3.0 300
6.0 3.0 300 3.0 300 3.0 300
C1
Capacitor Range
3.0
40
No
pF
4.5
40
Li-
6.0
40
mit
[VCO Section]
AC ELECTRICAL CHARACTERISTICS(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
Guaranteed Limit
V
CC
Symbo
Parameter
V
25
°C
to
≤85°C
≤125°C
l
-55°C
Min Max Min Max Min Max
Frequency Stability with Temperature 3.0
∆f/T
Changes (Figures 11A,B,C)
4.5
6.0
fo
VCO
Center
Frequency 3.0
3
(Duty
Factor
=
50%) 4.5
11
(Figures 12A,B,C)
6.0
13
3.0
See Figures 13A,B
∆fVCO
VCO Frequency Linearity
4.5
6.0
3.0
Typical 50%
∂VCO
Duty Factor at VCO
OUT
4.5
6.0
Unit
%/K
MHz
%
%
5
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