Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
AV
EE
, DV
EE
= -4.94 to -5.46V, V
CC
= +4.75 to +5.25V, CTRL AMP IN = REF OUT,
T
A
= 25
o
C for All Typical Values
HI5721BI
T
A
= -40
o
C TO 85
o
C
PARAMETER
SYSTEM PERFORMANCE
Resolution
Integral Linearity Error, INL
Differential Linearity Error, DNL
Offset Error, I
OS
Full Scale Gain Error, FSE
Offset Drift Coefficient
Full Scale Output Current, I
FS
Output Voltage Compliance Range
DYNAMIC CHARACTERISTICS
Throughput Rate
Output Voltage Full Scale Step Settling Time, t
SETT FS
Output Voltage Small Step Settling Time, t
SETT SM
Singlet Glitch Area, GE (Peak Glitch)
Doublet Glitch Area, (Net Glitch)
Output Slew Rate
Output Rise Time
Output Fall Time
(Note 3)
(Note 3)
TEST CONDITIONS
MIN
TYP
MAX
UNITS
10
(Note 4) (“Best Fit” Straight Line)
(Note 4)
(Note 4)
(Notes 2, 4)
(Note 3)
-
-
-
-
-
-
-1.5
-
±0.5
±0.5
16
2
0.1
-20.48
-
-
±1.5
±1.0
75
10
-
-
+3.0
Bits
LSB
LSB
µA
%
µA/
o
C
mA
V
125.0
-
-
-
-
-
4.5
3.5
3.5
1.5
1,000
675
470
-
-
-
-
-
-
-
-
MSPS
ns
ns
pV•s
pV•s
V/µs
ps
ps
To
±0.5
LSB Error Band R
L
= 50Ω (Note 3)
100mV Step to
±0.5
LSB Error Band, R
L
= 50Ω
(Note 3)
R
L
= 50Ω (Note 3)
R
L
= 50Ω
,
DAC Operating in Latched Mode
(Note 3)
R
L
= 50Ω
,
DAC Operating in Latched Mode
(Note 3)
R
L
= 50Ω
,
DAC Operating in Latched Mode
(Note 3)
-
-
-
3
HI5721
Electrical Specifications
AV
EE
, DV
EE
= -4.94 to -5.46V, V
CC
= +4.75 to +5.25V, CTRL AMP IN = REF OUT,
T
A
= 25
o
C for All Typical Values
(Continued)
HI5721BI
T
A
= -40
o
C TO 85
o
C
PARAMETER
Spurious Free Dynamic Range, SFDR to Nyquist
TEST CONDITIONS
f
CLK
= 125 MSPS, f
OUT
= 2.02MHz, 62.5MHz
Span (Notes 3, 5)
f
CLK
= 125 MSPS, f
OUT
= 25MHz, 62.5MHz Span
(Notes 3, 5)
f
CLK
= 100 MSPS, f
OUT
= 2.02MHz, 50MHz Span
(Notes 3, 5)
f
CLK
= 100 MSPS, f
OUT
= 25MHz, 50MHz Span
(Notes 3, 5)
Spurious Free Dynamic Range, SFDR Within a
Window
f
CLK
= 125 MSPS, f
OUT
= 2.02MHz, 2MHz Span
(Notes 3, 5)
f
CLK
= 125 MSPS, f
OUT
= 25MHz, 2MHz Span
(Notes 3, 5)
f
CLK
= 100 MSPS, f
OUT
= 2.02MHz, 2MHz Span
(Notes 3, 5)
f
CLK
= 100 MSPS, f
OUT
= 25MHz, 2MHz Span
(Notes 3, 5)
Signal to Noise Ratio (SNR) to Nyquist
(Ignoring the First 5 Harmonics)
f
CLK
= 125 MSPS, f
OUT
= 2.02MHz,
(Notes 3, 5)
f
CLK
= 125 MSPS, f
OUT
= 25MHz
(Notes 3, 5)
f
CLK
= 100 MSPS, f
OUT
= 2.02MHz,
(Notes 3, 5)
f
CLK
= 100 MSPS, f
OUT
= 25MHz
(Notes 3, 5)
Signal to Noise Ratio + Distortion (SINAD) to Nyquist
f
CLK
= 125 MSPS, f
OUT
= 2.02MHz,
(Notes 3, 5)
f
CLK
= 125 MSPS, f
OUT
= 25MHz
(Notes 3, 5)
f
CLK
= 100 MSPS, f
OUT
= 2.02MHz,
(Notes 3, 5)
f
CLK
= 100 MSPS, f
OUT
= 25MHz
(Notes 3, 5)
Total Harmonic Distortion (THD) to Nyquist
f
CLK
= 125 MSPS, f
OUT
= 2.02MHz,
(Notes 3, 5)
f
CLK
= 125 MSPS, f
OUT
= 25MHz
(Notes 3, 5)
f
CLK
= 100 MSPS, f
OUT
= 2.02MHz,
(Notes 3, 5)
f
CLK
= 100 MSPS, f
OUT
= 25MHz
(Notes 3, 5)
Intermodulation Distortion (IMD) to Nyquist
f
CLK
= 125 MSPS, f
OUT1
= 800kHz,
f
OUT2
= 900kHz (Notes 3, 5)
f
CLK
= 100 MSPS, f
OUT1
= 800kHz,
f
OUT2
= 900kHz (Notes 3, 5)
MIN
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP
-59
-53
-59
-51
-75
-70
-75
-72
54
51.5
54.5
50.3
52.4
49.2
52.7
47.6
-57.8
-53.3
-57.9
-51
57.3
57.2
MAX
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
UNITS
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dB
dB
dB
dB
dB
dB
dB
dB
dBc
dBc
dBc
dBc
dB
dB
4
HI5721
Electrical Specifications
AV
EE
, DV
EE
= -4.94 to -5.46V, V
CC
= +4.75 to +5.25V, CTRL AMP IN = REF OUT,
T
A
= 25
o
C for All Typical Values
(Continued)
HI5721BI
T
A
= -40
o
C TO 85
o
C
PARAMETER
REFERENCE/CONTROL AMPLIFIER
Internal Reference Voltage, REF OUT
Internal Reference Voltage Drift
Internal Reference Output Current Sink/Source
Capability
Amplifier Input Impedance
Amplifier Large Signal Bandwidth
Amplifier Small Signal Bandwidth
Reference Input Impedance
Reference Input Multiplying Bandwidth
DIGITAL INPUTS
(D9-D0, CLK, INVERT)
Input Logic High Voltage, V
IH
Input Logic Low Voltage, V
IL
Input Logic Current, I
IH
Input Logic Current, I
IL
Digital Input Capacitance, C
IN
TIMING CHARACTERISTICS
Data Setup Time, t
SU
Data Hold Time, t
HLD
Propagation Delay Time, t
PD
CLK Pulse Width, t
PW1
, t
PW2
POWER SUPPLY CHARACTERISITICS
IDV
EE
IAV
EE
V
CC
Power Dissipation
Power Supply Rejection Ratio
NOTES:
2. Gain Error measured as the error in the ratio between the full scale output current and the current through R
SET
(typically 640µA). Ideally the
ratio should be 32.
3. Parameter guaranteed by design or characterization and not production tested.
4. All devices are 100% tested at 25
o
C. 100% productions tested at temperature extremes for military temperature devices, sample tested for
industrial temperature devices.
5. Spectral measurements made without external filtering.
1. Introduction
Electronic scales are gradually replacing traditional measuring tools like springs and balances in everyday life, such as electronic price computing scales and electronic weigh...[详细]
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