HM514170D, HM514270D Series
HM51S4170D, HM51S4270D Series
262,144-word
×
16-bit Dynamic RAM
ADE-203-672 (Z)
Preliminary
Rev. 0.0
Oct. 18, 1996
Description
The Hitachi HM51(S)4170D, HM51(S)4270D Series are CMOS dynamic RAM organized as 262,144-word
×
16-bit. HM51(S)4170D, HM51(S)4270D Series have realized higher density, higher performance and various
functions by employing 0.8
µm
CMOS process technology and some new CMOS circuit design technologies.
The HM51(S)4170D, HM51(S)4270D Series offer fast page mode as a high speed access mode. They have
the package variations of standard 400-mil 40-pin plastic SOJ and standard 400-mil 44-pin plastic TSOPII.
Internal refresh timer enables HM51S4170D, HM51S4270D Series self refresh operation.
Features
•
Single 5 V supply: 5 V
±
10%
•
Access time: 60 ns/70 ns/80 ns (max)
•
Low power dissipation
Active mode: 825 mW/660 mW/578 mW (max) (HM51(S)4170D Series)
825 mW/770 mW/688 mW (max) (HM51(S)4270D Series)
Standby mode: 11 mW (max)
1.1 mW (max) (L-version)
•
Fast page mode capability
•
Refresh cycles
1024 refresh cycles: 16 ms (HM51(S)4170D Series)
128 ms (L-version) (HM51(S)4170DL Series)
512 refresh cycles: 8 ms (HM51(S)4270D Series)
128 ms (L-version) (HM51(S)4270DL Series)
•
2 variations of refresh
RAS-only
refresh
CAS-before-RAS
refresh
Preliminary: This document contains information on a new product. Specifications and information
contained herein are subject to change without notice.
HM51(S)4170D Series, HM51(S)4270D Series
•
2
WE-byte
control
•
Self refresh operation (HM51S4170D, HM51S4270D)
•
Battery backup operation (L-version)
Ordering Information
Type No.
HM514170DJ-6
HM514170DJ-7
HM514170DJ-8
HM514170DLJ-6
HM514170DLJ-7
HM514170DLJ-8
HM514270DJ-6
HM514270DJ-7
HM514270DJ-8
HM514270DLJ-6
HM514270DLJ-7
HM514270DLJ-8
HM51S4170DJ-6
HM51S4170DJ-7
HM51S4170DJ-8
HM51S4170DLJ-6
HM51S4170DLJ-7
HM51S4170DLJ-8
HM51S4270DJ-6
HM51S4270DJ-7
HM51S4270DJ-8
HM51S4270DLJ-6
HM51S4270DLJ-7
HM51S4270DLJ-8
HM514170DTT-6
HM514170DTT-7
HM514170DTT-8
HM514170DLTT-6
HM514170DLTT-7
HM514170DLTT-8
HM514270DTT-6
HM514270DTT-7
HM514270DTT-8
HM514270DLTT-6
HM514270DLTT-7
HM514270DLTT-8
Access time
60 ns
70 ns
80 ns
60 ns
70 ns
80 ns
60 ns
70 ns
80 ns
60 ns
70 ns
80 ns
60 ns
70 ns
80 ns
60 ns
70 ns
80 ns
60 ns
70 ns
80 ns
60 ns
70 ns
80 ns
60 ns
70 ns
80 ns
60 ns
70 ns
80 ns
60 ns
70 ns
80 ns
60 ns
70 ns
80 ns
400 mil 44-pin plastic TSOP II (TTP-44/40DB)
Package
400-mil 40-pin plastic SOJ (CP-40D)
2
HM51(S)4170D Series, HM51(S)4270D Series
Pin Arrangement
HM514170DJ/DLJ Series
HM51S4170DJ/DLJ Series
V
CC
I/O0
I/O1
I/O2
I/O3
V
CC
I/O4
I/O5
I/O6
I/O7
NC
LWE
UWE
RAS
A9
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
V
SS
I/O15
I/O14
I/O13
I/O12
V
SS
I/O11
I/O10
I/O9
I/O8
NC
NC
CAS
OE
A8
A7
A6
A5
A4
V
SS
HM514170DTT/DLTT Series
HM51S4170DTT/DLTT Series
V
CC
I/O0
I/O1
I/O2
I/O3
V
CC
I/O4
I/O5
I/O6
I/O7
1
2
3
4
5
6
7
8
9
10
44
43
42
41
40
39
38
37
36
35
V
SS
I/O15
I/O14
I/O13
I/O12
V
SS
I/O11
I/O10
I/O9
I/O8
(Top view)
NC
LWE
UWE
RAS
A9
A0
A1
A2
A3
V
CC
13
14
15
16
17
18
19
20
21
22
32
31
30
29
28
27
26
25
24
23
NC
NC
CAS
OE
A8
A7
A6
A5
A4
V
SS
(Top view)
Pin Description
Pin name
A0 to A9
Function
Address input
— Refresh address A0 to A9
— Row address
A0 to A9
— Column address A0 to A7
I/O0 to I/O15 Data input/output
RAS
CAS
UWE
/
LWE
OE
V
CC
V
SS
NC
Row address strobe
Column address strobe
Read/write enable
Output enable
Power supply
Ground
No connection
4
HM51(S)4170D Series, HM51(S)4270D Series
Pin Arrangement
HM514270DJ/DLJ Series
HM51S4270DJ/DLJ Series
V
CC
I/O0
I/O1
I/O2
I/O3
V
CC
I/O4
I/O5
I/O6
I/O7
NC
LWE
UWE
RAS
NC
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
V
SS
I/O15
I/O14
I/O13
I/O12
V
SS
I/O11
I/O10
I/O9
I/O8
NC
NC
CAS
OE
A8
A7
A6
A5
A4
V
SS
HM514270DTT/DLTT Series
HM51S4270DTT/DLTT Series
V
CC
I/O0
I/O1
I/O2
I/O3
V
CC
I/O4
I/O5
I/O6
I/O7
1
2
3
4
5
6
7
8
9
10
44
43
42
41
40
39
38
37
36
35
V
SS
I/O15
I/O14
I/O13
I/O12
V
SS
I/O11
I/O10
I/O9
I/O8
(Top view)
NC
LWE
UWE
RAS
NC
A0
A1
A2
A3
V
CC
13
14
15
16
17
18
19
20
21
22
32
31
30
29
28
27
26
25
24
23
NC
NC
CAS
OE
A8
A7
A6
A5
A4
V
SS
(Top view)
Pin Description
Pin name
A0 to A8
Function
Address input
— Refresh address A0 to A8
— Row address
A0 to A8
— Column address A0 to A8
I/O0 to I/O15 Data input/output
RAS
CAS
UWE
/
LWE
OE
V
CC
V
SS
NC
Row address strobe
Column address strobe
Read/write enable
Output enable
Power supply
Ground
No connection
5
Silicon Labs测评专区
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
