HN58X2402-SR/HN58X2404-SR/
HN58X2408-SR/HN58X2416-SR/
HN58X2432-SR/HN58X2464-SR
Two-wire serial interface
2k EEPROM (256-word
×
8-bit)
4k EEPROM (512-word
×
8-bit)
8k EEPROM (1-kword
×
8-bit)/16k EEPROM (2-kword
×
8-bit)
32k EEPROM (4-kword
×
8-bit)/64k EEPROM(8-kword
×
8-bit)
ADE-203-920A (Z)
Rev. 1.0
Dec. 11, 1998
Description
HN58X24xx series are two-wire serial interface EEPROM (Electrically Erasable and Programmable
ROM). They realize high speed, low power consumption and a high level of reliability by employing
advanced MNOS memory technology and CMOS process and low voltage circuitry technology. They also
have a 32-byte page programming function to make their write operation faster.
Features
•
•
•
•
Single supply: 1.8 V to 5.5 V
Two-wire serial interface (I
2
C
TM
serial bus*
1
)
Clock frequency: 400 kHz
Power dissipation:
Standby: 3
µA(max)
Active (Read): 1 mA(max)
Active (Write): 3 mA(max)
Automatic page write: 32-byte/page
Write cycle time: 10 ms (2.7 V to 5.5 V )/15ms (1.8 V to 2.7 V )
Endurance: 10
5
Cycles (Page write mode)
Data retention: 10 Years
Small size packages: TSSOP-8pin and SOP-8pin
•
•
•
•
•
HN58X2402/58X2404/58X2408/58X2416/58X2432/58X2464-SR
Note: 1. I
2
C is a trademark of Philips Corporation.
Ordering Information
Type No.
Internal organization Operating voltage Frequency Package
1.8 V to 5.5 V
400 kHz
150 mil 8-pin plastic SOP
(FP-8DB)
HN58X2402FP-SR 2k bit (256
×
8-bit)
HN58X2404FP-SR 4k bit (512
×
8-bit)
HN58X2408FP-SR 8k bit (1024
×
8-bit)
HN58X2416FP-SR 16k bit (2048
×
8-bit)
HN58X2432FP-SR 32k bit (4096
×
8-bit)
HN58X2464FP-SR 64k bit (8192
×
8-bit)
HN58X2402T-SR
HN58X2404T-SR
HN58X2408T-SR
HN58X2416T-SR
HN58X2432T-SR
HN58X2464T-SR
2k bit (256
×
8-bit)
4k bit (512
×
8-bit)
8k bit (1024
×
8-bit)
16k bit (2048
×
8-bit)
32k bit (4096
×
8-bit)
64k bit (8192
×
8-bit)
1.8 V to 5.5 V
400 kHz
8-pin plastic TSSOP
(TTP-8D)
2
HN58X2402/58X2404/58X2408/58X2416/58X2432/58X2464-SR
Pin Arrangement
8-pin TSSOP
8-pin SOP
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
(Top view)
V
CC
WP
SCL
SDA
Pin Description
Pin name
A0 to A2
SCL
SDA
WP
V
CC
V
SS
Function
Device address
Serial clock input
Serial data input/output
Write protect
Power supply
Ground
3
HN58X2402/58X2404/58X2408/58X2416/58X2432/58X2464-SR
Block Diagram
V
CC
V
SS
Address generator
WP
A0, A1, A2
SCL
SDA
Control
logic
High voltage generator
X decoder
Memory array
Y decoder
Y-serect & Sense amp.
Serial-parallel converter
Absolute Maximum Ratings
Parameter
Supply voltage relative to V
SS
Input voltage relative to V
SS
Operating temperature range*
1
Storage temperature range
Symbol
V
CC
Vin
Topr
Tstg
Value
–0.6 to +7.0
–0.5*
2
to +7.0*
3
–20 to +85
–65 to +125
Unit
V
V
˚C
˚C
Notes: 1. Including electrical characteristics and data retention.
2. Vin (min): –3.0 V for pulse width
≤
50 ns.
3. Should not exceed V
CC
+ 1.0 V.
4
HN58X2402/58X2404/58X2408/58X2416/58X2432/58X2464-SR
DC Operating Conditions
Parameter
Supply voltage
Symbol
V
CC
V
SS
Input high voltage
Input low voltage
Operating temperature
V
IH
V
IL
Topr
Min
1.8
0
V
CC
×
0.7
–0.3*
1
–20
Typ
—
0
—
—
—
Max
5.5
0
V
CC
+ 1.0
V
CC
×
0.3
85
Unit
V
V
V
V
˚C
Notes: 1. V
IL
(min): –1.0 V for pulse width
≤
50 ns.
DC Characteristics
(Ta = –20 to +85˚C, V
CC
= 1.8 V to 5.5 V)
Parameter
Input leakage current
Output leakage current
Standby V
CC
current
Read V
CC
current
Write V
CC
current
Output low voltage
Symbol
I
LI
I
LO
I
SB
I
CC1
I
CC2
V
OL2
Min
—
—
—
—
—
—
Typ
—
—
1.0
—
—
—
Max
2.0
2.0
3.0
1.0
3.0
0.4
Unit
µA
µA
µA
mA
mA
V
Test conditions
V
CC
= 5.5 V, Vin = 0 to 5.5 V
V
CC
= 5.5 V, Vout = 0 to 5.5 V
Vin = V
SS
or V
CC
V
CC
= 5.5 V, Read at 400 kHz
V
CC
= 5.5 V, Write at 400 kHz
V
CC
= 4.5 to 5.5 V, I
OL
= 1.6 mA
V
CC
= 2.7 to 4.5 V, I
OL
= 0.8 mA
V
CC
= 1.8 to 2.7 V, I
OL
= 0.4 mA
V
CC
= 1.8 to 2.7 V, I
OL
= 0.2 mA
V
OL1
—
—
0.2
V
Capacitance
(Ta = 25˚C, f = 1 MHz)
Parameter
Symbol
Min
—
—
Typ
—
—
Max
6.0
6.0
Unit
pF
pF
Test
conditions
Vin = 0 V
Vout = 0 V
Input capacitance (A0 to A2, SCL, WP) Cin*
1
Output capacitance (SDA)
Note:
C
I/O
*
1
1. This parameter is sampled and not 100% tested.
5
FPGA/CPLD
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