PRELIMINARY
PFM
V•I Chip PFM
Power Factor Module
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•
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•
•
•
•
•
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Input: rectified 120/240 Vac sinusoidal
Output: 48 Vdc programmable
Output power: Up to 200 W
4,242 Vdc reinforced insulation
90% efficiency
375 W/in
3
power density
Low profile: 0.25”
Surface mount J Lead package
Meets EN 61000-3-2 harmonic current limits
F3D480T20A
DC+
+IN
™
PR
SC
SG
+Out
BV
RSV
PC
F3D480T20A
8395846576834856
–IN
PFM
™
Actual Size
Pb
S
C
NRTL
US
–Out
U.S. & FOREIGN PATS. AND PATS. PENDING. MADE IN U.S.A.
©
Product Description
The PFM (Power Factor Module) is a V•I Chip
power component that converts a rectified
120/240 Vac line to an isolated, regulated DC
voltage programmable from 26 V to 48 V.
Rated at 200 W, the PFM meets EN61000-3-2
harmonic current limits and is available in a double
VIC package measuring only 1.69" (43,0) x
1.26" (32,0) x 0.25" (6,2). The PFM power density
is 375 W/in
3
.
The PFM is the front-end V•I Chip for AC-DC
power systems. It requires only a rectifier, input
filter and an output capacitor to provide
a high density, power factor corrected, 200 W
power supply. The high operating frequency and
soft switching allow miniaturization of power train
components and make EMI filter components
smaller than those required by lower frequency,
hard switching converters. Output energy storage
is accomplished at SELV levels providing packaging
and interconnect flexibility not available with
conventional AC Front Ends.
PFMs may be paralleled with power sharing for
added power or redundancy in single or three
phase systems. The output voltage can be
programmed to meet the requirements of system
loads and/or additional downstream conversion
devices such as Vicor’s Pre Regulator Modules (PRMs)
and Voltage Transformation Modules (VTMs).
Absolute Maximum Ratings
Parameter
Input voltage (+IN to -IN)
Operating
Non-operating
Input voltage slew rate
PC to -IN
BV to -IN
PR to -OUT
SC
Output voltage (+OUT to -OUT)
Output current
Dielectric withstand (input to output)
Temperature
Operating junction
Storage
Case peak temperature during reflow
Case peak temperature during reflow
Min
90
0
-0.3
-0.3
-0.3
-0.3
-0.5
Max
264
450
25
7
50
7
1.5
55
6
4,242
Unit
Vrms
Vdc
V/µs
Vdc
Vdc
Vdc
Vdc
Vdc
A
Vdc
Notes
Rectified AC sinusoidal
100 ms
Reinforced insulation
1 Min
M-Grade
M-Grade
MSL 3
MSL 6
-55
-65
125
150
225
245
˚C
˚C
˚C
˚C
Part Numbering
F
Power Factor
Module
3
Input Designator
3 = 115/230 Vac
D
480
Output Voltage
Designator
(V
OUT
x10)
T
20
Output Power
Designator
(P
OUT
x 0.1)
A
A = Analog
Control
Package
D = Double VIC w/ J leads
Product Grade Temperatures (°C)
Grade
Storage
Operating
T
-40 to150 -40 to125
M
-65 to150 -55 to125
Input Filter / Rectifier
L
PFM
48 Vdc
200 W
Load
N
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
Power Factor Module
F3D480T20A
Rev. 1.0
Page 1 of 14
PRELIMINARY
Electrical characteristics
Rectified AC Input Source
Parameter
Source voltage low range
Source voltage high range
Source frequency range
(Conditions: 25˚C case, 75% rated load and specified input voltage range unless otherwise specified.)
The PFM operates from a full bridge rectified AC line with the following characteristics:
Min
90
180
47
Typ
Max
132
264
63
Unit
Vrms
Vrms
Hz
Note
The PFM is not designed to support output load
when the input is 132 to 175 Vrms
Input
(Operating from AC input source)
Parameter
Undervoltage shut down
Overvoltage shut down
Power factor
Inrush current
Min
Typ
82
Max
85
Unit
Vrms
Vrms
Note
Source voltage
Source voltage
47 – 63 Hz
265
0.94
275
5
A pk
Output
Parameter
Set point
Output voltage trim range
Output current
Output power
OVP set point
Line regulation
Load regulation
Efficiency
No load power dissipation
Current share accuracy
Switching frequency ripple
Line frequency ripple
Start up time
From application of power
Dynamic response
Voltage deviation
Recovery time
Output capacitance
Hold-up capacitance
Short circuit protection
1,500
1,500
2.0
2.5
6
500
2,200
2,200
5.5
10,000
10,000
6.0
5.0
S
%
mS
µF
µF
A
No overshoot
Of Vout
Required for PFC. Output ripple is a function of output
and hold-up capacitance. See Fig.8 for hold-up time.
Current limited
5
240
350
1.12
88
Min
47.5
26
0
0
56
Typ
48.0
48
Max
48.5
48.0
4.1
200
58
Unit
Vdc
Vdc
A
W
Vdc
%
%
%
Note
Output may be trimmed down from factory set point
via external trim resistor. See page 4, SC pin
Vout
=
48 Vdc
Vout
=
48 Vdc see Fig. 22 for heat sink information
0.3
0.5
90
1
1
0.75
10
300
750
2.0
120 Vrms 75% load
Meets Energy Star no load limit
~1.2 MHz with 10 µF ceramic bypass capacitance
With 10,000 µF output capacitor
W
%
mV pk-pk
mV rms
V pk-pk
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
Power Factor Module
F3D480T20A
Rev. 1.0
Page 2 of 14
PRELIMINARY
Electrical (cont.)
(conditions: 25˚C case, 75% rated load and specified input voltage range)
Control Pins
(See page 4 for pin description)
Pin
BV (Bias Voltage)
PC (Primary Control)
DC voltage
Module disable threshold
Module enable threshold
Disable hysteresis
Current limit
Analog control
PR (Parallel Port)
Voltage
Source current
External capacitance
SC (Secondary Control)
Voltage
Internal capacitance
External capacitance
1.23
1.24
1.0
0.7
1.25
Vdc
nF
µF
Referenced to SG
0.6
1
100
7.5
V
mA
pF
Referenced to SG, see PR pin pg.4
2.0
4.8
2.3
5.0
2.4
2.5
100
2.7
3.5
2.6
5.2
Vdc
Vdc
Vdc
mV
mA
PC pulled low
Referenced to -IN
Min
-0.5
Typ
Max
48
Unit
V
Note
Referenced to -IN
General
Parameter
Over temperature shut down
Junction-to-case thermal impedance
Case-to-ambient thermal impedance
Dielectric withstand
Insulation resistance
Capacitance
Leakage current
Line fuse Rating
Mechanical
Weight
Length
Width
Height
Reflow parameters
Resistance to cleaning
Solvents
Agency approvals (pending)
IEC 68-2-45 XA
Method 1
cTÜVus
CE
Water
Isopropyl alcohol
4,242
10
110
30
250
4
1.0 / 30
1.69 / 43
1.26 / 32
0.25 / 6.2
Min
125
Typ
130
0.6
2.3
Max
135
Unit
°C
°C/W
°C/W
Vdc
M ohms
pF
µA
Vac
A
oz / g
in / mm
in / mm
in / mm
Note
Junction temperature
46 mm x 46 mm x11mm heatsink #31474
with 300 LFM
Input to output
Input to output
Input to output
Always ascertain and observe applicable safety,
regulatory and agency specifications
Contact Vicor for information regarding soldering of
the PFM to printed circuit boards.
+55 ±5˚C
+35 ±5˚C
UL/CSA 60950, EN 60950
Low voltage directive
Electromagnetic Compatibility
(configured as illustrated in Fig. 18 )
Harmonic currents
Line disturbance / immunity
Transient / surge immunity
Conducted emissions
Flicker / inrush
EN 61000-3-2, Amendment 14
EN 61000-4-11
EN 61000-4-5
EN 55022, Level B
EN 61000-3-3
See Fig. 11
Interruptions and brownouts
2 kV – 50 µs line or neutral to earth
1 kV – 50 µs line to neutral
With filter ( see Fig. 18 )
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
Power Factor Module
F3D480T20A
Rev. 1.0
Page 3 of 14
PRELIMINARY
Pin/Control Functions
Power Factor Module (PFM)
DC+
PR
SC
SG
BV
RSV
PC
-IN
-OUT
+IN
SC – secondary control
(analog control models only)
The output voltage may be programmed, margined or trimmed down
by connecting a voltage source or resistor between the SC port and SG
port. The slew rate of the output voltage may be reduced by controlling
the rate-of-rise for the voltage at the SC port ( e.g. to limit inrush into a
capacitive load).
The following expression should be used to calculate the required set
point resistor value. No resistor is required if the user desires a nominal
48 V output.
R = ( Vo / (48 - Vo) ) 30.1 kΩ
Where: R = the set point resistor
Vo = the desired output voltage set point
Example:
Vo
R
42 V 211 kΩ
36 V 90.3 kΩ
+OUT
BOTTOM VIEW
Figure 1—
PFM pin out
Primary side
+IN / -IN – DC voltage
The PFM operates from a full wave rectified AC voltage within the
limits shown on page 2. PFMs have internal over / undervoltage
lockout functions that prevent operation outside of the specified rms
input range. PFMs will turn on when the input voltage rises above its
undervoltage lockout. If the input voltage exceeds the overvoltage
lockout, PFMs will shut down until the overvoltage fault clears.
BV - bias voltage
A 47 µF 50 V electrolytic capacitor must be connected between this
port and –IN to provide energy storage for the primary bias circuit.
RSV – reserved
PC – primary control
The PFM voltage output is enabled when the PC pin is open circuit
(floating). To disable the PFM output voltage, the PC pin is pulled to
–IN. Open collector optocouplers, transistors, or relays can be used to
control the PC pin. When using multiple PFMs in a high power array,
the PC ports should be tied together to synchronize their turn on.
Table 1
1.25 V
Full Scale
SC
μP
ref
1.25 V
30.1 kΩ
1 nF
SG
Figure 2—Functional
block diagram
Secondary side
DC+
A hold-up capacitor should be connected between this port and SG
to provide output hold-up in the event of an input power failure.
For 10 ms hold-up at full load, a 2,200 µF 50 V electrolytic capacitor
is recommended. DC+ should not be back driven.
PR – parallel port
(analog control models only)
The PR port signal, which is proportional to the PFM output power,
supports current sharing among PFMs. To enable current sharing, PR
ports should be interconnected. No bypass capacitance should be used
when interconnecting PR ports and steps should be taken to minimize
stray capacitance and noise coupling into this line (e.g, by minimizing
the width of PR port interconnect traces that lay over, or in proximity
to, signal grounds or power / ground planes). The PR port is referenced
to SG.
SG – signal return
(analog control models only)
This port should be used as reference for the SC, PR, and DC+ ports.
Care must be taken to insure there are no low impedance paths
between -OUT and SG. Such a path could allow current to bypass the
internal current sense resistor.
+ OUT / -OUT – voltage output
These ports provide the isolated DC output voltage. The –OUT pin is
separated from the SG (Signal Return) pin by the internal current
sensing resistor.
Safety consideration
Care must be exercised to insure appropriate spacing, clearance and
creepage distances are maintained between line side terminals and
secondary SELV terminals.
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
Power Factor Module
F3D480T20A
Rev. 1.0
Page 4 of 14
PRELIMINARY
PFM Theory of Operation
The PFM power-processing module consists of two major functional
blocks: an Adaptive Voltage Transformation Module (VTM) that
interfaces directly to the rectified line followed by a microprocessor
controlled Post Regulator Module (PRM). In contrast to offline power
factor correction topologies, input current shaping and energy storage
are accomplished on the secondary side of the isolation boundary.
+IN
Adaptive VTM
The Adaptive VTM acts as a nearly ideal DC-to-DC transformer. It
accepts the rectified AC input from the power source, configures its
step down ratio, or K factor, based on the magnitude of the input
voltage, and produces an isolated DC output that instantaneously
tracks the input. The Adaptive VTM configures itself by paralleling
input cells in low voltage input mode or by series configuration of
input cells in high voltage input mode. Operating over the worldwide
AC mains, the Adaptive VTM reduces the voltage variation applied to
the PRM stage from 3 to1 to 1.5 to1. This reduction in voltage range
allows greater performance and economy than would be possible
without Adaptive Transformation, which is enabled by Vicor’s
proprietary class of Cascaded Topologies.
To PRM
Control
–IN
Figure 3—
120 Vac input configuration
The PFM uses a Sine Amplitude Converter (SAC) Cascaded Topology
providing zero-voltage/zero-current switching through a low Q
resonant circuit to eliminate switching losses. The SAC can be
operated efficiently at high frequencies, typically in the 3 MHz range.
The high operating frequency allows miniaturization of power train
components with a commensurate increase in converter power
density. High operating frequency and soft switching makes EMI
filtering components smaller than those required by lower frequency,
hard switching converters.
+IN
To PRM
Control
–IN
Figure 4—
240 Vac input configuration
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
Power Factor Module
F3D480T20A
Rev. 1.0
Page 5 of 14
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