HY62U8100B Series
128Kx8bit CMOS SRAM
Document Title
128K x8 bit 3.0V Low Power CMOS slow SRAM
Revision History
Revision No
10
History
Initial Revision History Insert
Revised
- Insert 70ns Part
Change the Notch Location of sTSOP
- Left-Top => Left-Center
Marking Information Add
Revised
- AC Test Condition Add : 5pF Test Load
Changed Logo
- HYUNDAI -> hynix
- Marking Information Change
Draft Date
Jul.25.2000
Remark
Final
11
Sep.04.2000
Final
12
Dec.04.2000
Final
13
Apr.30.2001
Final
This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev 13 / Apr. 2001
Hynix Semiconductor
HY62U8100B Series
DESCRIPTION
The HY62U8100B is a high speed, low power and
1M bit CMOS SRAM organized as 131,072 words
by 8bit. The HY62U8100B uses high performance
CMOS process technology and designed for high
speed low power circuit technology. It is
particulary well suited for used in high density low
power system application. This device has a data
retention mode that guarantees data to remain
valid at a minimum power supply voltage of 2.0V.
FEATURES
•
Fully static operation and Tri-state output
•
TTL compatible inputs and outputs
•
Battery backup(LL-part)
-. 2.0V(min) data retention
•
Standard pin configuration
-. 32 - SOP - 525mil
-. 32 - TSOP-I - 8X20(Standard and Reversed)
-. 32 - sTSOP-I - 8X13.4
(Standard and Reversed)
Product
No.
HY62U8100B
HY62U8100B-E
HY62U8100B-I
Voltage
(V)
2.7~3.3
2.7~3.3
2.7~3.3
Speed
(ns)
70*/85/100
70*/85/100
70*/85/100
Operation
Current/Icc(mA)
5
5
5
Standby Current(uA)
LL
10
15
15
Temperature
(°C)
0~70
-25~85(E)
-40~85(I)
Note 1. Blank : Commercial, E : Extended, I : Industrial
2. Current value is max.
* 70ns is available with 30pF test load
PIN CONNECTION
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
Vcc
A15
CS2
/WE
A13
A8
A9
A11
/OE
A10
/CS1
I/O8
I/O7
I/O6
I/O5
I/O4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A11
A9
A8
A13
/WE
CS2
A15
Vcc
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
/OE
A10
/CS1
DQ8
DQ7
DQ6
DQ5
DQ4
Vss
DQ3
DQ2
DQ1
A0
A1
A2
A3
A11
A9
A8
A13
/WE
CS2
A15
Vcc
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
/OE
A10
/CS1
DQ8
DQ7
DQ6
DQ5
DQ4
Vss
DQ3
DQ2
DQ1
A0
A1
A2
A3
SOP
TSOP-I
( Standard )
sTSOP-I
(Standard)
PIN DESCRIPTION
Pin Name
/CS1
CS2
/WE
/OE
A0 ~ A16
I/O1 ~ I/O8
Vcc
Vss
Pin Function
Chip Select 1
Chip Select 2
Write Enable
Output Enable
Address Inputs
Data Inputs / Outputs
Power(2.7V~3.3V)
Ground
A0
BLOCK DIAGRAM
ROW
DECODER
SENSE AMP
I/O1
ADD INPUT
BUFFER
DATA I/O
BUFFER
COLUMN
DECODER
MEMORY ARRAY
128K x 8
WRITE DRIVER
A16
I/O8
/CS1
COLUMN
DECODER
CS2
/OE
/WE
Rev 13 / Apr. 2001
2
HY62U8100B Series
ORDERING INFORMATION
Part No.
HY62U8100BLLG
HY62U8100BLLT1
HY62U8100BLLR1
HY62U8100BLLST
HY62U8100BLLSR
HY62U8100BLLG-E
HY62U8100BLLT1-E
HY62U8100BLLR1-E
HY62U8100BLLST-E
HY62U8100BLLSR-E
HY62U8100BLLG-I
HY62U8100BLLT1-I
HY62U8100BLLR1-I
HY62U8100BLLST-I
HY62U8100BLLSR-I
Speed
70*/85/100
70*/85/100
70*/85/100
70*/85/100
70*/85/100
70*/85/100
70*/85/100
70*/85/100
70*/85/100
70*/85/100
70*/85/100
70*/85/100
70*/85/100
70*/85/100
70*/85/100
Power
LL-part
LL-part
LL-part
LL-part
LL-part
LL-part
LL-part
LL-part
LL-part
LL-part
LL-part
LL-part
LL-part
LL-part
LL-part
Temp.
Package
SOP
TSOP-I(Standard)
TSOP-I(Reversed)
smaller TSOP-I(Standard)
smaller TSOP-I(Reversed)
SOP
TSOP-I(Standard)
TSOP-I(Reversed)
Smaller TSOP-I(Standard)
Smaller TSOP-I(Reversed)
SOP
TSOP-I(Standard)
TSOP-I(Reversed)
Smaller TSOP-I(Standard)
Smaller TSOP-I(Reversed)
E
E
E
E
E
I
I
I
I
I
Note 1. Blank : Commercial, E : Extended, I : Industrial
* 70ns is available with 30pF test load
ABSOLUTE MAXIMUM RATING (1)
Symbol
Vcc, V
IN,
V
OUT
T
A
Parameter
Power Supply, Input/Output Voltage
Operating Temperature
Rating
-0.3 to 4.6
0 to 70
-25 to 85
-40 to 85
-65 to 125
10
50
260
•
10
Unit
V
°C
°C
°C
°C
W
mA
°C•sec
Remark
HY62U8100B
HY62U8100B-E
HY62U8100B-I
T
STG
P
D
I
OUT
T
SOLDER
Storage Temperature
Power Dissipation
Data Output Current
Lead Soldering Temperature & Time
Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these or
any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliability.
TRUTH TABLE
/CS1
H
X
L
L
L
CS2
X
L
H
H
H
/WE
X
X
H
H
L
/OE
X
X
H
L
X
Mode
Deselected
Deselected
Output Disabled
Read
Write
I/O
High-Z
High-Z
High-Z
Data Out
Data In
Power
Standby
Standby
Active
Active
Active
Note :
1. H=V
IH
, L=V
IL
, X=don't care( V
IH or
V
IL )
Rev 13 / Apr. 2001
2
HY62U8100B Series
RECOMMENDED DC OPERATING CONDITION
Symbol
Vcc
Vss
V
IH
V
IL
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
2.7
0
2.2
-0.3
(1)
Typ.
3.0
0
-
-
Max.
3.3
0
Vcc+0.3
0.6
Unit
V
V
V
V
Note :
1. V
IL
= -1.5V for pulse width less than 30ns and not 100% tested
DC ELECTRICAL CHARACTERISTICS
Vcc = 2.7V~3.3V, T
A
= 0°C to 70°C / -25°C to 85°C (E) / -40°C to 85°C (I), unless otherwise specified
Symbol
Parameter
Test Condition
Min. Typ. Max.
I
LI
Input Leakage Current
Vss < V
IN
< Vcc
-1
-
1
I
LO
Output Leakage Current
Vss <V
OUT
< Vcc,
-1
-
1
/CS1 = V
IH
or CS2 = V
IL
or
/
OE
=
V
IH
or /WE = V
IL
Icc
Operating Power Supply
/CS1 = V
IL
, CS2 = V
IH,
-
-
5
Current
V
IN
= V
IH
or V
IL,
I
I/O =
0mA
I
CC1
Average Operating
/CS1 = V
IL
, CS2 = V
IH
,
-
-
30
Current
VIN = V
IH
or V
IL
Cycle Time = Min, 100% duty,
I
IO
= 0mA
I
SB
TTL Standby Current
/CS1 = V
IH
or CS2 = V
IL ,
-
-
0.5
(TTL Input)
VIN = V
IH
or V
IL
I
SB1
Standby
HY62U8100B
/CS1 > Vcc - 0.2V or CS2 < 0.2V,
-
0.5
10
Current
HY62U8100B-E V
IN
> Vcc - 0.2V or
-
0.5
15
(CMOS Input)
HY62U8100B-I
V
IN
< Vss + 0.2V
-
0.5
15
V
OL
Output Low Voltage
I
OL
= 2.1mA
-
-
0.4
V
OH
Output High Voltage
I
OH =
-1.0mA
2.2
-
-
Note : Typical values are at Vcc = 3.0V, T
A
= 25°C
Unit
uA
uA
mA
mA
mA
uA
uA
uA
V
V
CAPACITANCE
(Temp = 25°C, f= 10MHz)
Symbol
Parameter
C
IN
Input Capacitance
C
OUT
Output Capacitance
Condition
V
IN
= 0V
V
I/O
= 0V
Max.
6
8
Unit
pF
pF
Note : These parameters are sampled and not 100% tested
Rev 13 / Apr. 2001
3
HY62U8100B Series
AC CHARACTERISTICS
Vcc = 2.7V~3.3V, T
A
= 0°C to 70°C / -25°C to 85°C (E) / -40°C to 85°C (I), unless otherwise specified
-70*
-85
-10
# Symbol
Parameter
Min.
Max. Min.
Max. Min
Max.
READ CYCLE
1
tRC
Read Cycle Time
70
-
85
-
100
-
2
tAA
Address Access Time
-
70
-
85
-
100
3
tACS
Chip Select Access Time
-
70
-
85
-
100
4
tOE
Output Enable to Output Valid
-
40
-
45
-
50
5
tCLZ
Chip Select to Output in Low Z
10
-
10
-
10
-
6
tOLZ
Output Enable to Output in Low Z
5
-
5
-
5
-
7
tCHZ
Chip Deselection to Output in High Z
0
30
0
30
0
30
8
tOHZ
Out Disable to Output in High Z
0
30
0
30
0
30
9
tOH
Output Hold from Address Change
10
-
10
-
15
-
WRITE CYCLE
10 tWC
Write Cycle Time
70
-
85
-
100
-
11 tCW
Chip Selection to End of Write
60
-
70
-
80
-
12 tAW
Address Valid to End of Write
60
-
70
-
80
-
13 tAS
Address Set-up Time
0
-
0
-
0
-
14 tWP
Write Pulse Width
50
-
55
-
75
-
15 tWR
Write Recovery Time
0
-
0
-
0
-
16 tWHZ
Write to Output in High Z
0
25
0
30
0
35
17 tDW
Data to Write Time Overlap
30
-
40
-
45
-
18 tDH
Data Hold from Write Time
0
-
0
-
0
-
19 tOW
Output Active from End of Write
5
-
5
-
10
-
Note * 70ns is available with 30pF test load
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC TEST CONDITIONS
T
A
= 0°C to 70°C / -25°C to 85°C (E) / -40°C to 85°C (I), unless otherwise specified
Parameter
Value
Input Pulse Level
0.4V to 2.2V
Input Rise and Fall Time
5ns
Input and Output Timing Reference Level
1.5V
Output Load
tCLZ,tOLZ,tCHZ,tOHZ,tWHZ,tOW
CL = 5pF + 1TTL Load
Others
CL = 100pF + 1TTL Load
CL = 30pF + 1TTL Load
AC TEST LOADS
TTL
CL(1)
Note : 1 Including jig and scope capacitance
Rev 13 / Apr. 2001
4
FPGA/CPLD
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