D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
74VCX16835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs
October 1998
Revised August 2001
74VCX16835
Low Voltage 18-Bit Universal Bus Driver
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX16835 low voltage 18-bit universal bus driver
combines D-type latches and D-type flip-flops to allow data
flow in transparent, latched and clocked modes.
Data flow is controlled by output-enable (OE), latch-enable
(LE), and clock (CLK) inputs. The device operates in
Transparent Mode when LE is held HIGH. The device
operates in clocked mode when LE is LOW and CLK is tog-
gled. Data transfers from the Inputs (I
n
) to Ouputs (O
n
) on a
Positive Edge Transition of the Clock. When OE is LOW,
the output data is enabled. When OE is HIGH the output
port is in a high impedance state.
The 74VCX16835 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O capability up to 3.6V.
The 74VCX16835 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
Compatible with PC100 DIMM module specifications
s
1.65V–3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
(CLK to O
n
)
4.2ns max for 3.0V to 3.6V V
CC
5.2ns max for 2.3V to 2.7V V
CC
9.2ns max for 1.65V to 1.95V V
CC
s
Power-down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
Static Drive (I
OH
/I
OL
)
±
24mA @ 3.0V
±
18mA @ 2.3V
±
6mA @ 1.65V
s
Latchup performance exceeds 300 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
(OE to GND) through a pulldown resistor;
the minimum value of the resistor is determined by the current sourcing
capability of the driver.
Ordering Code:
Order Number
74VCX16835GX
(Note 2)
74VCX16835MTD
(Note 3)
Package Number
BGA54A
(Preliminary)
MTD56
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 2:
BGA package available in Tape and Reel only.
Note 3:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 2001 Fairchild Semiconductor Corporation
DS500173
www.fairchildsemi.com
74VCX16835
Connection Diagrams
Pin Assignment for TSSOP
Pin Descriptions
Pin Names
OE
LE
CLK
I
1
- I
18
O
1
- O
18
NC
Description
Output Enable Input (Active LOW)
Latch Enable Input
Clock Input
Data Inputs
3-STATE Outputs
No Connect
FBGA Pin Assignments
1
A
B
C
D
E
F
G
H
J
O
2
O
4
O
6
O
8
O
10
O
12
O
14
O
16
O
17
2
O
1
O
3
O
5
O
7
O
9
O
11
O
13
O
15
O
18
3
NC
NC
V
CC
GND
GND
GND
V
CC
OE
LE
4
GND
NC
V
CC
GND
GND
GND
V
CC
CLK
GND
5
I
1
I
3
I
5
I
7
I
9
I
11
I
13
I
15
I
18
6
I
2
I
4
I
6
I
8
I
10
I
12
I
14
I
16
I
17
Truth Table
Inputs
OE
H
Pin Assignment for FBGA
L
L
L
L
L
L
LE
X
H
H
L
L
L
L
CLK
X
X
X
I
n
X
L
H
L
H
X
X
Outputs
O
n
Z
L
H
L
H
O
0
(Note 4)
O
0
(Note 5)
↑
↑
H
L
H
=
Logic HIGH
L
=
Logic LOW
X
=
Don’t Care, but not floating
Z
=
High Impedance
↑ =
LOW-to-HIGH Clock Transition
Note 4:
Output level before the indicated steady-state input conditions
were established provided that CLK was HIGH before LE went LOW.
Note 5:
Output level before the indicated steady-state input conditions
were established.
(Top Thru View)
www.fairchildsemi.com
2
74VCX16835
Logic Diagram
3
www.fairchildsemi.com
74VCX16835
Absolute Maximum Ratings
(Note 6)
Supply Voltage (V
CC
)
DC Input Voltage (V
I
)
Output Voltage (V
O
)
Outputs 3-STATE
Outputs Active (Note 7)
DC Input Diode Current (I
IK
) V
I
<
0V
DC Output Diode Current (I
OK
)
V
O
<
0V
V
O
>
V
CC
DC Output Source/Sink Current
(I
OH
/I
OL
)
DC V
CC
or Ground Current per
Supply Pin (I
CC
or Ground)
Storage Temperature Range (T
STG
)
−
0.5V to
+
4.6V
−
0.5V to
+
4.6V
−
0.5V to
+
4.6V
−
0.5 to V
CC
+
0.5V
−
50 mA
−
50 mA
+
50 mA
±
50 mA
±
100 mA
−
65
°
C to
+
150
°
C
Recommended Operating
Conditions
(Note 8)
Power Supply
Operating
Data Retention Only
Input Voltage
Output Voltage (V
O
)
Output in Active States
Output in 3-STATE
Output Current in I
OH
/I
OL
V
CC
=
3.0V to 3.6V
V
CC
=
2.3V to 2.7V
V
CC
=
1.65V to 2.3V
Free Air Operating Temperature (T
A
)
Minimum Input Edge Rate (
∆
t/
∆
V)
V
IN
=
0.8V to 2.0V, V
CC
=
3.0V
10 ns/V
Note 6:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-
ings. The Recommended Operating Conditions tables will define the condi-
tions for actual device operation.
Note 7:
I
O
Absolute Maximum Rating must be observed.
Note 8:
Floating or unused pin (inputs or I/O's) must be held HIGH or LOW.
1.65V to 3.6V
1.2V to 3.6V
−
0.3V to 3.6V
0V to V
CC
0V to 3.6V
±
24 mA
±
18 mA
±
6 mA
−
40
°
C to
+
85
°
C
DC Electrical Characteristics (2.7V
<
V
CC
≤
3.6V)
Symbol
V
IH
V
IL
V
OH
Parameter
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
I
OH
= −100 µA
I
OH
= −12
mA
I
OH
= −18
mA
I
OH
= −24
mA
V
OL
LOW Level Output Voltage
I
OL
=
100
µA
I
OL
=
12 mA
I
OL
=
18 mA
I
OL
=
24 mA
I
I
I
OZ
I
OFF
I
CC
∆I
CC
Input Leakage Current
3-STATE Output Leakage
Power Off Leakage Current
Quiescent Supply Current
Increase in I
CC
per Input
0V
≤
V
I
≤
3.6V
0V
≤
V
O
≤
3.6V
V
I
=
V
IH
or V
IL
0V
≤
(V
I
, V
O
)
≤
3.6V
V
I
=
V
CC
or GND
V
CC
≤
(V
I
, V
O
)
≤
3.6V (Note 9)
V
IH
=
V
CC
−
0.6V
Note 9:
Outputs disabled or 3-STATE only.
Conditions
V
CC
(V)
2.7–3.6
2.7–3.6
2.7–3.6
2.7
3.0
3.0
2.7–3.6
2.7
3.0
3.0
2.7–3.6
2.7–3.6
0
2.7–3.6
2.7–3.6
Min
2.0
Max
Units
V
0.8
V
CC
−
0.2
2.2
2.4
2.2
0.2
0.4
0.4
0.55
±5.0
±10
10
20
±20
750
V
V
V
µA
µA
µA
µA
µA
www.fairchildsemi.com
4
聊聊、笑笑、闹闹
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
