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IDT7204L50TPG

产品描述64K X 9 OTHER FIFO, 35 ns, PDIP28
产品类别存储   
文件大小111KB,共14页
制造商IDT(艾迪悌)
官网地址http://www.idt.com/
下载文档 详细参数 全文预览

IDT7204L50TPG概述

64K X 9 OTHER FIFO, 35 ns, PDIP28

64K × 9 其他先进先出, 35 ns, PDIP28

IDT7204L50TPG规格参数

参数名称属性值
功能数量1
端子数量28
最大工作温度70 Cel
最小工作温度0.0 Cel
最大供电/工作电压5.5 V
最小供电/工作电压4.5 V
额定供电电压5 V
最大存取时间35 ns
加工封装描述PLASTIC, DIP-28
无铅Yes
欧盟RoHS规范Yes
状态ACTIVE
工艺CMOS
包装形状RECTANGULAR
包装尺寸IN-LINE
端子形式THROUGH-HOLE
端子间距2.54 mm
端子涂层MATTE TIN
端子位置DUAL
包装材料PLASTIC/EPOXY
温度等级COMMERCIAL
内存宽度9
组织64K X 9
存储密度589824 deg
操作模式ASYNCHRONOUS
位数65536 words
位数64K
周期45 ns
内存IC类型OTHER FIFO

文档预览

下载PDF文档
CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9
8,192 x 9, 16,384 x 9
32,768 x 9 and 65,536 x 9
IDT7203
IDT7204
IDT7205
IDT7206
IDT7207
IDT7208
FEATURES:
First-In/First-Out Dual-Port memory
2,048 x 9 organization (IDT7203)
4,096 x 9 organization (IDT7204)
8,192 x 9 organization (IDT7205)
16,384 x 9 organization (IDT7206)
32,768 x 9 organization (IDT7207)
65,636 x 9 organization (IDT7208)
High-speed: 12ns access time
Low power consumption
— Active: 660mW (max.)
— Power-down: 44mW (max.)
Asynchronous and simultaneous read and write
Fully expandable in both word depth and width
Pin and functionally compatible with IDT720X family
Status Flags: Empty, Half-Full, Full
Retransmit capability
High-performance CMOS technology
Military product compliant to MIL-STD-883, Class B
Standard Military Drawing for #5962-88669 (IDT7203), 5962-89567
(IDT7203), and 5962-89568 (IDT7204) are listed on this function
Industrial temperature range (–40°C to +85°C) is available
(plastic packages only)
Green parts available, see ordering information
DESCRIPTION:
The IDT7203/7204/7205/7206/7207/7208 are dual-port memory buffers
with internal pointers that load and empty data on a first-in/first-out basis. The
device uses Full and Empty flags to prevent data overflow and underflow and
expansion logic to allow for unlimited expansion capability in both word size and
depth.
Data is toggled in and out of the device through the use of the Write (W) and
Read (R) pins.
The device's 9-bit width provides a bit for a control or parity at the user’s
option. It also features a Retransmit (RT) capability that allows the read pointer
to be reset to its initial position when
RT
is pulsed LOW. A Half-Full Flag is
available in the single device and width expansion modes.
These FIFOs are fabricated using IDT’s high-speed CMOS technology.
They are designed for applications requiring asynchronous and simultaneous
read/writes in multiprocessing, rate buffering and other applications.
Military grade product is manufactured in compliance with the latest revision
of MIL-STD-883, Class B.
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS
(D
0
-D
8
)
W
WRITE
CONTROL
WRITE
POINTER
RAM ARRAY
2,048 x 9
4,096 x 9
8,192 x 9
16,384 x 9
32,768 x 9
65,536 x 9
READ
POINTER
THREE-
STATE
BUFFERS
R
READ
CONTROL
FLAG
LOGIC
DATA OUTPUTS
(Q
0
-Q
8
)
RS
RESET
LOGIC
FL/RT
EF
FF
XI
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
EXPANSION
LOGIC
XO/HF
2661 drw01
COMMERCIAL, MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
©
2006 Integrated Device Technology, Inc. All rights reserved. Product subject to change without notice.
APRIL 2006
DSC-2661/15
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