MC10H350
PECL* to TTL Translator
(+5 Vdc Power Supply Only)
Description
The MC10H350 is a member of the 10H family of high performance
ECL logic. It consists of 4 translators with differential inputs and TTL
outputs. The 3−state outputs can be disabled by applying a HIGH TTL
logic level on the common OE input.
The MC10H350 is designed to be used primarily in systems
incorporating both ECL and TTL logic operating off a common power
supply. The separate V
CC
power pins are not connected internally and
thus isolate the noisy TTL V
CC
runs from the relatively quiet ECL
V
CC
runs on the printed circuit board. The differential inputs allow the
MC10H350 to be used as an inverting or noninverting translator, or a
differential line receiver. The MC10H350 can also drive CMOS with
the addition of a pullup resistor.
Features
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MARKING DIAGRAMS*
16
16
1
PDIP−16
P SUFFIX
CASE 648
1
MC10H350P
AWLYYWWG
1 20
•
Propagation Delay, 3.5 ns Typical
•
MECL 10K™ Compatible
•
Pb−Free Packages are Available*
20 1
PLCC−20
FN SUFFIX
CASE 775
A
WL
YY
WW
G
10H350G
AWLYYWW
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2012
October, 2012
−
Rev. 10
1
Publication Order Number:
MC10H350/D
MC10H350
9
ECL V
CC
TTL V
CC
3
4
5
6
11
12
13
14
V
CC
(+5.0 VDC) = PINS 1 AND 16
GND = PIN 8 (DIP)
NC
ECL V
CC
A
OUT
7
A
IN
A
IN
10
B
IN
B
IN
15
B
OUT
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
TTL V
CC
C
OUT
C
IN
C
IN
D
IN
D
IN
D
OUT
OE
A
IN
A
IN
NC
B
IN
B
IN
4
5
6
7
8
9 10 11 12 13
B
OUT
GND
D
OUT
NC
OE
MC10H350
C
OUT
18
17
16
15
14
A
OUT
3
2
2
1 20 19
C
IN
C
IN
NC
D
IN
D
IN
Pin assignment is for Dual−in−Line Package.
Figure 1. Logic Diagram
Figure 2. Dip Pin Assignment
Figure 3. PLCC−20 Pin Assignment
Table 1. MAXIMUM RATINGS
Symbol
V
CC
T
A
T
stg
Power Supply (V
EE
= GND)
Operating Temperature Range
Storage Temperature Range
−
Plastic
Characteristic
Rating
7.0
0 to +75
−55
to +150
Unit
Vdc
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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2
MC10H350
Table 2. ELECTRICAL CHARACTERISTICS
(V
CC
= 5.0 V
±5%)
(Note 1)
T
A
= 0°C to 75°C
Symbol
I
CC
I
IH
I
INH
I
IL
I
INL
V
IH
V
IL
V
DIFF
V
CM
V
OH
V
OL
I
OS
I
OZH
I
OZL
Input Voltage High
Input Voltage Low
Differential Input Voltage (Note 1)
Pins 3−6, 11−14 (1)
Voltage Common Mode
Pins 3−6, 11−14
Output Voltage High
I
OH
= 3.0 mA
Output Voltage Low
I
OL
= 20 mA
Short Circuit Current
V
OUT
= 0 V
Output Disable Current High
V
OUT
= 2.7 V
Output Disable Current Low
V
OUT
= 0.5 V
Power Supply Current
Input Current High
Input Current Low
Characteristic
TTL
ECL
Pin 9
Others
Pin 9
Others
Pin 9
Pin 9
Min
−
−
−
−
−
−
2.0
−
350
2.8
2.7
−
−60
−
−
Max
20
12
20
50
−0.6
50
−
0.8
−
V
CC
−
0.5
−150
50
−50
Unit
mA
mA
mA
mA
Vdc
Vdc
mV
Vdc
Vdc
Vdc
mA
mA
mA
*Positive Emitter Coupled Logic
1. Common mode input voltage to pins 3−4, 5−6, 11−12, 13−14 must be between the values of 2.8 V and 5.0 V. This common mode input voltage
range includes the differential input swing.
2. For single−ended use, apply 3.75 V (V
BB
) to either input depending on output polarity required. Signal level range to other input is 3.3 V to 4.2 V.
3. Any unused gates should have the inverting inputs tied to V
CC
and the noninverting inputs tied to ground to prevent output glitching.
Table 3. AC PARAMETERS
(C
L
= 50 pF) (V
CC
= 5.0
±
5%) (T
A
= 0°C to 75°C)
T
A
= 0°C to 75°C
Symbol
t
pd
t
r
t
f
t
pdLZ
t
pdHZ
t
pdZL
t
pdZH
Characteristic
Propagation Delay Data (50% to 1.5 V)
Rise Time (Note 4)
Fall Time (Note 4)
Output Disable Time
Output Enable Time
Min
1.5
0.3
0.3
2.0
2.0
2.0
2.0
Max
5.0
1.6
1.6
6.0
6.0
8.0
8.0
Unit
ns
ns
ns
ns
ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. 1.0 V to 2.0 V w/50 pF into 500
W.
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3
MC10H350
3-STATE OUTPUT LOW ENABLE AND
DISABLE TIMES
OE
1.5 V
T
PZL
V
OUT
1.5 V
T
PLZ
OE
1.5 V
T
PZH
1.5 V
T
PHZ
Q
V
OH
≈
3.5 V
3-STATE OUTPUT HIGH ENABLE AND
DISABLE TIMES
1.5 V
V
OL
1.5 V
V
OUT
0.3 V
0.3 V
Figure 4. 3−State Switching Waveforms
+7.0 V
OPEN
T
PZL
, T
PLZ
, O, C,
ALL OTHER
500
W
D.U.T
.
50 PF
500
W
*INCLUDES JIG AND PROBE CAPACITANCE
Application Note: Pin 9 is an OE and the MC10H350 is disabled when OE is at V
IH
or higher.
Figure 5. Test Load
ORDERING INFORMATION
Device
MC10H350FNG
MC10H350FNR2G
MC10H350P
MC10H350PG
Package
PLCC−20
(Pb−Free)
PLCC−20
(Pb−Free)
PDIP−16
PDIP−16
(Pb−Free)
Shipping
†
46 Units / Rail
500 / Tape & Reel
25 Unit / Rail
25 Unit / Rail
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
MC10H350
PACKAGE DIMENSIONS
20 LEAD PLCC
CASE 775−02
ISSUE F
B
−N−
Y BRK
D
−L−
−M−
W
D
V
Z
0.007 (0.180)
U
M
T L-M
M
S
N
S
S
0.007 (0.180)
T L-M
N
S
20
1
X
VIEW D−D
G1
0.010 (0.250)
S
T L-M
S
N
S
A
Z
R
0.007 (0.180)
0.007 (0.180)
M
T L-M
T L-M
S
N
N
S
M
S
S
H
K1
0.007 (0.180)
M
T L-M
S
N
S
C
E
0.004 (0.100)
G
G1
0.010 (0.250)
S
T L-M
J
−T−
VIEW S
S
SEATING
PLANE
K
F
VIEW S
0.007 (0.180)
M
T L-M
S
N
S
N
S
NOTES:
1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M,
1982.
2. DIMENSIONS IN INCHES.
3. DATUMS
−L−, −M−,
AND
−N−
DETERMINED WHERE TOP
OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD
PARTING LINE.
4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT
DATUM
−T−,
SEATING PLANE.
5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH.
ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER
THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE
BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY
MISMATCH BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION
TO BE GREATER THAN 0.037 (0.940). THE DAMBAR
INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO
BE SMALLER THAN 0.025 (0.635).
DIM
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1
K1
INCHES
MIN
MAX
0.385
0.395
0.385
0.395
0.165
0.180
0.090
0.110
0.013
0.021
0.050 BSC
0.026
0.032
0.020
−−−
0.025
−−−
0.350
0.356
0.350
0.356
0.042
0.048
0.042
0.048
0.042
0.056
−−−
0.020
2
_
10
_
0.310
0.330
0.040
−−−
MILLIMETERS
MIN
MAX
9.78
10.03
9.78
10.03
4.20
4.57
2.29
2.79
0.33
0.53
1.27 BSC
0.66
0.81
0.51
−−−
0.64
−−−
8.89
9.04
8.89
9.04
1.07
1.21
1.07
1.21
1.07
1.42
−−−
0.50
2
_
10
_
7.88
8.38
1.02
−−−
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