MCP2021A/2A
LIN Transceiver with Voltage Regulator
Features:
• The MCP2021A/2A are compliant with LIN Bus
Specifications Version 1.3, 2.1 and with SAE
J2602-2
• Support Baud Rates up to 20 kBaud
• 43V Load Dump Protected
• Maximum Continuous Input Voltage: 30V
• Wide LIN-Compliant Supply Voltage: 6.0 – 18.0V
• Extended Temperature Range: -40 to +125°C
• Interface to PIC
®
MCU EUSART and Standard
USARTs
• Wake-Up on LIN Bus Activity or Local Wake Input
• Local Interconnect Network (LIN) Bus Pin:
- Internal Pull-Up Termination Resistor and
Diode for Slave Node
- Protected Against V
BAT
Shorts
- Protected Against Loss of Ground
- High-Current Drive
• T
XD
and LIN Bus Dominant Time-Out Function
• Two Low-Power Modes:
- Transmitter Off: 90 µA (typical)
- Power Down: 4.5 µA (typical)
• Output Indicating Internal Reset State (POR or
Sleep Wake)
• MCP2021A/2A On-Chip Voltage Regulator:
- Output Voltage of 5.0V or 3.3V
at 70 mA Capability with Tolerances of ±3%
Over the Temperature Range
- Internal Short Circuit Current Limit
- External Components Limited to Filter
Capacitor and Load Capacitor
• Automatic Thermal Shutdown
• High Electromagnetic Immunity (EMI), Low
Electromagnetic Emission (EME)
• Robust ESD Performance: ±15 kV for L
BUS
and
V
BB
pin (IEC61000-4-2)
• Transient Protection for L
BUS
and V
BB
Pins in
Automotive Environment (ISO7637)
• Meets Stringent Automotive Design
Requirements, including “OEM Hardware
Requirements for LIN, CAN and FlexRay
Interfaces in Automotive Applications”, Version
1.2, March 2011
• Multiple Package Options, including Small
4x4 mm DFN Package
Description:
The MCP2021A/2A provide a bidirectional, half-duplex
communication physical interface to meet the LIN bus
specification Revision 2.1 and SAE J2602-2. The
devices incorporate a voltage regulator with 5V or 3.3V
at 70 mA regulated power supply output. The devices
have been designed to meet the stringent quiescent
current requirements of the automotive industry and
will survive +43V load dump transients and double
battery jumps.
Package Types
MCP2021A
PDIP, SOIC
R
XD
CS/LWAKE
V
REG
T
XD
1
2
3
4
8
7
6
5
FAULT/T
XE
V
BB
L
BUS
V
SS
MCP2021A
4x4 DFN
R
XD
1
CS/LWAKE 2
V
REG
3
T
XD
4
8 FAULT/T
XE
7 V
BB
6 L
BUS
5 V
SS
EP
9
MCP2022A
PDIP, SOIC, TSSOP
R
XD
CS/LWAKE
V
REG
T
XD
RESET
NC
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
FAULT/T
XE
V
BB
L
BUS
V
SS
NC
NC
NC
* Includes Exposed Thermal Pad (EP), see
Table 1-2.
2012-2014 Microchip Technology Inc.
DS20002298C-page 1
MCP2021A/2A
MCP2021A/2A Block Diagram
V
REG
Thermal
Protection
Short Circuit
Protection
Voltage
Regulator
Ratiometric
Reference
V
REG
Internal Circuits
V
REG
R
XD
CS/LWAKE
T
XD
Bus
Dominant
Timer
Slope Control
~ 30 k
4.2V
Wake-Up Logic
and
Power Control
RESET
(MCP2022A only)
V
BB
Bus Wake-Up
L
BUS
FAULT/T
XE
V
SS
Thermal and
Short Circuit
Protection
DS20002298C-page 2
2012-2014 Microchip Technology Inc.
MCP2021A/2A
1.0
DEVICE OVERVIEW
1.1
Modes of Operation
The MCP2021A/2A devices provide a physical
interface between a microcontroller and a LIN
half-duplex bus. They are intended for automotive and
industrial applications with serial bus baud rates up to
20 kBaud. These devices will translate the CMOS/TTL
logic levels to LIN logic levels and vice versa.
The MCP2021A/2A offer optimum EMI and ESD
performance and can withstand high voltage on the LIN
bus. The devices support two low-power modes to
meet automotive industry power consumption
requirements. The MCP2021A/2A also provide a +5V
or 3.3V regulated power output at 70 mA.
The MCP2021A/2A work in five modes: Power-On
Reset, Power-Down, Ready, Operation and
Transmitter Off. For an overview of all operational
modes, please refer to
Table 1-1.
For the operational
mode transition, please refer to
Figure 1-1.
FIGURE 1-1:
STATE DIAGRAM
CS/LWAKE =
0
POR
(2)
V
REG
OFF
RX OFF
TX OFF
V
BB
> V
ON
READY
V
REG
ON
RX ON
TX OFF
CS/LWAKE =
1&
FAULT/T
XE
=
0&
CS/LWAKE =
1 &
FAULT/T
XE
=
1
(3)
&
T
XD
=
1&
VREG_OK =
1
(1)
CS/LWAKE =
1 OR
Voltage Rising Edge on LBUS
TX OFF
V
REG
ON
RX ON
TX OFF
CS/LWAKE =
0
POWER-DOWN
V
REG
OFF
RX OFF
TX OFF
CS/LWAKE =
1&
FAULT/T
XE
=
1
(3)
&
T
XD
=
1
CS/LWAKE =
1&
FAULT/T
XE
=
0
OPERATION
V
REG
ON
RX ON
TX ON
CS/LWAKE =
0
Note 1:
VREG_OK: Regulator Output Voltage > 0.8V
REG
_
NOM
.
2:
If the voltage on pin V
BB
falls below V
OFF
, the device will enter Power-On Reset mode from all other
modes, which is not shown in the figure.
3:
FAULT/T
XE
=
1
represents input high and no fault conditions. FAULT/T
XE
=
0
represents input low or a
fault condition. Refer to
Table 1-5.
2012-2014 Microchip Technology Inc.
DS20002298C-page 3
MCP2021A/2A
1.1.1
POWER-ON RESET MODE
1.1.4
TRANSMITTER OFF MODE
Upon application of V
BB
or whenever the voltage on
V
BB
is below the threshold of regulator turn-off voltage
V
OFF
(typically 4.50V), the device enters Power-On
Reset (POR) mode. During this mode, the device
maintains the digital section in a Reset mode and waits
until the voltage on the V
BB
pin rises above the
threshold of regulator turn-on voltage V
ON
(typically
5.75V) to enter Ready mode. In Power-On Reset
mode, the LIN physical layer and voltage regulator are
disabled and the RESET output (MCP2022A only) is
forced to low.
In Transmitter Off mode, the receiver is enabled but the
L
BUS
transmitter is off. It is a lower power mode.
In order to minimize power consumption, the regulator
operates in a reduced-power mode. It has a lower
GBW product and it is thus slower. However, the 70 mA
drive capability is unchanged.
The transmitter may be re-enabled whenever the
FAULT/T
XE
signal returns high, by removing the
internal fault condition and by driving FAULT/T
XE
high.
The transmitter will not be enabled even if the
FAULT/T
XE
pin is brought high externally, when the
internal fault is still present. However, externally forcing
the FAULT/T
XE
high while the internal fault is still
present should be avoided, since this will induce high
current and power dissipation in the FAULT/T
XE
pin.
The transmitter is also turned off whenever the voltage
regulator is unstable or recovering from a fault. This
prevents unwanted disruption of the bus during times of
uncertain operation.
1.1.2
READY MODE
The device enters Ready mode from POR mode after
the voltage on V
BB
rises above the threshold of
regulator turn-on voltage V
ON
or from Power-Down
mode when a remote or local wake-up event happens.
Upon entering Ready mode, the voltage regulator and
the receiver section of the transceiver are powered up.
The transmitter remains in an off state. The device is
ready to receive data but not to transmit. In order to
minimize the power consumption, the regulator
operates in a reduced-power mode. It has a lower
GBW product and it is thus slower. However, the 70 mA
drive capability is unchanged.
The device stays in Ready mode until the output of the
voltage regulator has stabilized and the CS/LWAKE pin
is high (‘1’).
1.1.5
POWER-DOWN MODE
In Power-Down mode, the transceiver and the voltage
regulator are both off. Only the bus wake-up section
and the CS/LWAKE pin wake-up circuits are in
operation. This is the lowest power mode.
If any bus activity (e.g., a Break character) occurs
during Power-Down mode, the device will immediately
enter Ready mode and enable the voltage regulator.
Then, once the regulator output has stabilized
(approximately 0.3 ms to 1.2 ms), it goes into
Operation mode. Refer to
Section 1.1.6 “Remote
Wake-Up”.
The part will also enter Ready mode from Power-Down
mode, followed by the Operation mode, if the
CS/LWAKE pin becomes active high (‘1’).
1.1.3
OPERATION MODE
If V
REG
is OK (V
REG
> 0.8 V
REG
_
NORM
) and the
CS/LWAKE, FAULT/TXE and T
XD
pins are high, the
part enters Operation mode from either Ready or
Transmitter Off mode.
In this mode, all internal modules are operational. The
internal pull-up resistor between L
BUS
and V
BB
is
connected only in this mode.
The device goes into Power-Down mode at the falling
edge on CS/LWAKE or into Transmitter Off mode at the
falling edge on FAULT/T
XE
while CS/LWAKE stays
high.
1.1.6
REMOTE WAKE-UP
The Remote Wake-Up sub-module observes the L
BUS
in order to detect bus activity. In Power-Down mode,
normal LIN recessive/dominant threshold is disabled
and the LIN bus wake-up voltage threshold V
WK
(
LBUS
)
is used to detect bus activities. Bus activity is detected
when the voltage on the L
BUS
falls below the LIN bus
wake-up voltage threshold V
WK
(
LBUS
) (approximately
3.5V) for at least t
BDB
(a typical duration of 80 µs)
followed by a rising edge. Such a condition causes the
device to leave Power-Down mode.
DS20002298C-page 4
2012-2014 Microchip Technology Inc.
MCP2021A/2A
TABLE 1-1:
State
POR
Ready
Operation
OVERVIEW OF OPERATIONAL MODES
Internal
Voltage
Transmitter Receiver Wake
Regulator
Module
OFF
OFF
ON
OFF
ON
ON
OFF
OFF
OFF
OFF
ON
ON
Operation
Proceed to Ready mode after
V
BB
> V
ON
If CS/LWAKE is high, then proceed to Bus Off
Operation or Transmitter Off mode.
state
If CS/LWAKE is low, then proceed to
Power-Down mode.
If FAULT/T
XE
is low, then proceed to
Transmitter Off mode.
Normal
Operation
mode
Comments
Power-Down
OFF
OFF
ON
Activity
Detect
OFF
OFF
On LIN bus rising edge or CS/LWAKE Lowest
high level, go to Ready mode.
power mode
If CS/LWAKE is low, then proceed to
Power-Down mode.
If FAULT/T
XE
is high, then proceed to
Operation mode.
Bus Off
state,
lower power
mode
Transmitter Off
OFF
ON
ON
2012-2014 Microchip Technology Inc.
DS20002298C-page 5
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