6A Highly Integrated SupIRBuck
TM
Single-
Input Voltage, Synchronous Buck Regulator
IR3827
FEATURES
•
Single input voltage range from 5V to 21V
•
Wide input voltage range from 1.0V to 21V with
external V
CC
bias voltage
•
Output voltage range from 0.6V to 0.86% PVin
•
Enhanced line/load regulation with feedforward
•
Programmable switching frequency up to
1.2MHz
•
Three user selectable soft-start time
•
User selectable LDO output voltage
•
Enable input with voltage monitoring capability
•
Thermally compensated current limit with robust
hiccup mode over current protection
•
Synchronization to an external clock
•
Enhanced Pre-bias start-up
•
Precise reference voltage (0.6V+/-0.6%)
•
Open-drain PGood indication
•
Optional power up sequencing
•
Integrated MOSFET drivers and bootstrap diode
•
Thermal Shut Down
•
Monotonic Start-Up
•
Operating temp: -40°C < T
j
< 125°C
•
Package size: 4mm x 5mm PQFN
•
Lead-free, Halogen-free and RoHS6 Compliant
DESCRIPTION
The IR3827 SupIRBuck
TM
is an easy-to-use, fully
integrated and highly efficient DC/DC regulator.
The onboard PWM controller and MOSFETs make
IR3827 a space-efficient solution, providing accurate
power delivery for low output voltage applications.
IR3827 is a versatile regulator which offers
programmable switching frequency and internally set
current limit while operating in wide range of input and
output voltage conditions.
The switching frequency is programmable from 300kHz
to 1.2MHz for an optimum solution. It also features
important protection functions, such as Pre-Bias
startup, thermally compensated current limit, over
voltage protection and thermal shutdown to give
required system level security in the event of fault
conditions.
APPLICATIONS
•
Computing Applications
•
Set Top Box Applications
•
Storage Applications
•
Data Center Applications
•
Distributed Point of Load Power Architectures
ORDERING INFORMATION
Base Part Number
IR3827
IR3827
Package Type
PQFN 4 mm x 5 mm
PQFN 4 mm x 5 mm
Standard Pack
Form
Quantity
Tape and Reel
750
Tape and Reel
4000
Orderable Part Number
IR3827MTR1PBF
IR3827MTRPBF
IR3827
PBF –
Lead Free
TR/TR1 –
Tape and Reel
M –
PQFN Package
1
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© 2013 International Rectifier
July 18, 2013
IR3827
BASIC APPLICATION
Vin
SS_Select Vin
Vcc/
LDO_out
PGood
PGood
Seq
Enable
Rt/Sync
IR3827
PVin
Boot
SW
Vo
Fb
Comp
LDO_Select Gnd PGnd
Figure 1 IR3827 Basic Application Circuit
Figure 2 IR3827 Efficiency
PINOUT DIAGRAM
IR3827
PVin
13
SW
12
11
PGnd
Boot
14
Enable
15
Seq
16
GND
10
Vcc/LDO_Out
17
9
Vin
8
LDO_Select
2
C
N/
1
3
mp
Co
4
d
Gn
5
c
Rt/
Syn
SS_
6
ect
Sel
7
PG
oo
d
2
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© 2013 International Rectifier
Fb
Figure 3 4mm x 5mm PQFN (Top View)
July 18, 2013
IR3827
BLOCK DIAGRAM
Vin
5.1V/6.9V
Internal LDO
VCC
Vcc/ LDO_Out
THERMAL
TSD
LDO_Select
SHUT DOWN
OC
FAULT
CONTROL
Boot
Gnd
UVcc
UVcc
POR
OV
Comp
Seq
VREF
+
0.6V
-
0.15V
+
+
E/A
+
-
FAULT
POR VCC
PVin
Fb
POR
INTL_SS
VREF
Vin
Fb
HDrv
OV
OVER
VOLTAGE
HDin
GATE
DRIVE
LDin
SW
SS_Select
POR
FAULT
SOFT
START
SSOK
LDrv
CONTROL
VREF
PGnd
SEQ
LOGIC
OC
Enable
UVEN
UVEN
Over Current
Protection
POR
UVcc
POR
Rt/Sync PGood
Figure 4 Simplified Block Diagram
3
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© 2013 International Rectifier
July 18, 2013
IR3827
PIN DESCRIPTIONS
PIN #
PIN NAME
PIN DESCRIPTION
Inverting input to the error amplifier. This pin is connected directly to the output of the
regulator via a resistor divider to set the output voltage and to provide the feedback signal
to the error amplifier.
Should not be connected to other signals on PCB layout. It is internally connected for
testing purpose.
Output of error amplifier. An external resistor and capacitor network is typically connected
from this pin to Fb pin to form a loop compensator.
Signal ground for internal reference and control circuitry.
Multi-function pin to set the switching frequency. The internal oscillator frequency is set
with a resistor between this pin and Gnd. Or synchronization to an external clock by
connecting this pin to the external clock signal through a diode.
Soft start selection pin. Three user selectable soft start time is available: 1.5ms
(SS_Select=Vcc), 3ms (SS_Select=Float), 6ms (SS_Select=Gnd)
Open-drain power good indication pin. Connect a pull-up resistor from this pin to Vcc.
LDO output voltage selection pin. Float gives 5.1V and low 0V (Gnd) gives 6.9V
Input for internal LDO. A 1.0µF capacitor should be connected between this pin and
PGnd. If external supply is connected to Vcc/LDO_out pin, this pin should be shorted to
Vcc/LDO_out pin. Connecting this pin to PV
in
can also implement the input voltage
feedforward.
Output of the internal LDO and optional input of an external biased supply voltage.
minimum 2.2µF ceramic capacitor is recommended between this pin and PGnd.
A
1
Fb
2
3
4, 17
5
N/C
Comp
Gnd
Rt/Sync
6
SS_Select
7
8
PGood
LDO_Select
9
V
in
10
11
12
13
14
15
Vcc/LDO_Out
PGnd
SW
PV
in
Boot
Enable
Power Ground. This pin serves as a separated ground for the MOSFET drivers and
should be connected to the system’s power ground plane.
Switch node. Connected this pin to the output inductor.
Input voltage for power stage.
Supply voltage for high side driver, a 100nF capacitor should be connected between this
pin and SW pin.
Enable pin to turn on and off the device. Input voltage monitoring (input UVLO) can also
be implemented by connecting this pin to PVin pin through a resistor divider.
Sequence pin to do simultaneous and ratiometric sequencing operation. A resistor divider
can be connected from master output to this pin for sequencing mode of operation. If not
used, leave it open.
Signal ground for internal reference and control circuitry.
16
17
Seq
Gnd
4
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© 2013 International Rectifier
July 18, 2013
IR3827
ABSOLUTE MAXIMUM RATINGS
Stresses beyond these listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications are not implied.
PVin, Vin to PGnd (Note 4)
Vcc/LDO_Out to PGnd (Note 4)
Boot to PGnd (Note 4)
SW to PGnd (Note 4)
Boot to SW
PGood, SS_Select to Gnd (Note 4)
Other Input/Output Pins to Gnd (Note 4)
PGnd to Gnd
THERMAL INFORMATION
Junction to Ambient Thermal Resistance Ɵ
jA
Junction to PCB Thermal Resistance Ɵ
j-PCB
Storage Temperature Range
Junction Temperature Range
32 °C/W (Note 3)
2 °C/W
-55°C to 150°C
-40°C to 150°C
-0.3V to 25V
-0.3V to 8V (Note 1)
-0.3V to 33V
-0.3V to 25V (DC), -4V to 25V (AC, 100ns)
-0.3V to V
CC
+ 0.3V (Note 2)
-0.3V to V
CC
+ 0.3V (Note 2)
-0.3V to +3.9V
-0.3V to +0.3V
Note 1:
Vcc must not exceed 7.5V for Junction Temperature between -10°C and -40°C
Note 2:
Must not exceed 8V
Note 3:
Based on IRDC3827 demo board - 2.6”x2.2”, 4-layer PCB board using 2 oz. copper on each layer.
Note 4:
PGnd pin and Gnd pin are connected together.
5
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© 2013 International Rectifier
July 18, 2013
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