www.fairchildsemi.com
FAN5066
Ultra Low Voltage Synchronous DC-DC Controller
Features
•
•
•
•
•
•
•
•
Output adjustable from 400mV to 3.5V
Synchronous Rectification
Adjustable operation from 80KHz to 1MHz
Integrated Power Good and Enable functions
Overvoltage protection
Overcurrent protection
Drives N-channel MOSFETs
20 pin SOIC or TSSOP package
Description
The FAN5066 is a synchronous mode DC-DC controller IC
which provides an adjustable output voltage for ultra-low
voltage applications, down to 400mV. The FAN5066 uses a
high level of integration to deliver load currents in excess of
19A from a 5V source with minimal external circuitry.
Synchronous-mode operation offers optimum efficiency over
the entire output voltage range, and the internal oscillator
can be programmed from 80KHz to 1MHz for additional
flexibility in choosing external components. The FAN5066
also offers integrated functions including a four-bit
DAC-controlled reference, Power Good, Output Enable,
over-voltage protection and current limiting.
Applications
•
•
•
•
Power supply DDR SDRAM VTT
Power Supply HSTL
Power Supply for ASICs
Adjustable ultra-low voltage step-down power supply
Block Diagram
+12V
FAN5066
1
–
+
+5V
5
4
OSC
–
+
13
12
–
+
–
+
DIGITAL
CONTROL
+5V
7
9
VO
CNTRL
VREF
16
20
4-BIT
DAC
19 18
17
8
1.24V
REFERENCE
POWER
GOOD
2
3
PWRGD
VID2
VID4
VID1
VID3
ENABLE
PRELIMINARY INFORMATION
describes products that are not in full production at the time of printing. Specifications are based on design goals
REV. 2.1.4 11/13/01
and limited characterization. They may change without notice. Contact Fairchild Semiconductor for current information.
FAN5066
PRODUCT SPECIFICATION
Pin Assignments
CEXT
ENABLE
PWRGD
IFB
VFB
VCCA
VCCP
VID4
LODRV
GNDP
1
2
3
4
5
6
7
8
9
10
20
19
18
17
VREF
VID1
VID2
VID3
CNTRL
GNDA
GNDD
VCCQP
HIDRV
GNDP
FAN5066
16
15
14
13
12
11
Pin Definitions
Pin Number Pin Name
1
CEXT
Pin Function Description
Oscillator Capacitor Connection
. Connecting an external capacitor to this pin sets
the internal oscillator frequency. Layout of this pin is critical to system performance.
See Application Information for details.
Output Enable
. A logic LOW on this pin will disable the output. An internal pull-up
resistor allows for either open collector or TTL compatibility.
Power Good Flag
. An open collector output that will be at logic LOW if the output
voltage is not within
±
12% of the nominal output voltage setpoint.
High Side Current Feedback
. Pins 4 and 5 are used as the inputs for the current
feedback control loop. Layout of these traces is critical to system performance. See
Application Information for details.
Voltage Feedback
. Pin 5 is used as the input for the voltage feedback control loop and
as the low side current feedback input. See Application Information for details regarding
correct layout.
Analog VCC
. Connect to system 5V supply and decouple with a 0.1
µ
F ceramic
capacitor.
Power VCC for low side FET driver
. Connect to system 5V supply and place a 1
µ
F
ceramic capacitor for decoupling and local charge storage.
VID4 Input
. A logic 1 on this open collector/TTL input will enable the VID3–VID0 inputs
to set the output from 2.1V to 3.5V, and a logic 0 will set the output from 1.3V to 2.05V,
as shown in Table 1. Pullup resistors are internal to the controller.
Low Side FET Driver
. Connect this pin to the gate of an N-channel MOSFET for
synchronous operation. The trace from this pin to the MOSFET gate should be < 0.5".
Power Ground
. Return pin for high currents flowing in pins 7 and 13 (VCCP and
VCCQP). Connect to a low impedance ground.
High Side FET Driver
. Connect this pin to the gate of an N-channel MOSFET. The
trace from this pin to the MOSFET gate should be < 0.5".
Power VCC
. For high side FET driver. VCCQP must be connected to a voltage of at
least VCCA + V
GS,ON
(MOSFET), and place a 1
µ
F ceramic capacitor for decoupling
and local charge storage. See Application Information for details
Digital Ground
. Return path for digital logic. Connect to a low impedance system
ground plane to minimize ground loops.
Analog Ground
. Return path for low power analog circuitry. This pin should be
connected to a low impedance system ground plane to minimize ground loops.
Voltage Control
. The voltage forced on this pin determines the output voltage of the
converter.
2
3
4
ENABLE
PWRGD
IFB
5
VFB
6
7
8
VCCA
VCCP
VID4
9
10, 11
12
13
LODRV
GNDP
HIDRV
VCCQP
14
15
16
17-19
GNDD
GNDA
CNTRL
VID1-VID3
Voltage Identification Code Inputs
. These open collector/TTL compatible inputs will
program the output voltage of the reference over the ranges specified in Table 1.
Pull-up resistors are internal to the controller.
VREF
Reference Voltage Test Point
. This pin provides access to the DAC output and should
be decoupled to ground using 0.1µF capacitor.
REV. 2.1.4 11/13/01
20
2
PRODUCT SPECIFICATION
FAN5066
Absolute Maximum Ratings
Supply Voltages, VCCA, VCCP, VCCQP to GND
Supply Voltage VCCQP, Charge Pump (V
IN
+VCCA)
Voltage Identification Code Inputs, VID3-VID0
VREF Output Current
Junction Temperature, T
J
Storage Temperature
Lead Soldering Temperature, 10 seconds
13V
18V
13V
3mA
150
°
C
-65 to 150
°
C
300
°
C
Operating Conditions
Parameter
Supply Voltage, VCCA, VCCP
Input Logic HIGH
Input Logic LOW
Ambient Operating Temp
Output Driver Supply, VCCQP
0
8.5
Conditions
Min.
4.75
2.0
0.8
70
12
Typ.
5
Max.
5.25
Units
V
V
V
°
C
V
Electrical Specifications
Parameter
Initial Voltage Setpoint
Output Temperature Drift
Load Regulation
Line Regulation
Output Ripple
DAC Output Voltage
DAC Accuracy
Short Circuit Detect Threshold
Output Driver Rise and Fall Time
Output Driver Deadtime 1
Output Driver Deadtime 2
Turn-on Response Time
Oscillator Range
Oscillator Frequency
PWRGD threshold
PWRGD Minimum Operating
Voltage
Max Duty Cycle
Control Pin Input Current
(V
CCA
= 5V, V
CNTRL
= 900mV, f
osc
= 300 KHz, and T
A
= +25
°
C using circuit in Figure 1, unless otherwise noted)
The
•
denotes specifications which apply over the full operating temperature range.
Conditions
I
LOAD
= 0.8A, V
CTRL
= 1.25V
V
CTRL
= 900mV
T
A
= 0 to 70
°
C V
OUT
= 1.25V
V
OUT
= 900mV
I
LOAD
= 0.8A to 3A
V
IN
= 4.75V to 5.25V
20MHz BW, I
LOAD
= 3A
See Table 1
•
See Figure 3
See Figure 3
See Figure 3
I
LOAD
= 0A to 3A
80
C
EXT
= 100 pF
Logic High
Logic Low
270
93
88
1.0
90
V
CTRL
= 400mV to 3.5V
•
95
235
300
1.3
-3
90
120
80
5
80
10
1000
330
107
112
•
•
•
•
Min.
1.237
891
Typ.
1.250
900
+6
+4
-20
±
2
±
13
3.4
+3
150
Max.
1.263
909
Units
V
mV
mV
mV
mV
mV
mVpk
V
%
mV
nsec
%/f
OSC
nsec
msec
KHz
KHz
%V
OUT
%V
OUT
V
%
µA
REV. 2.1.4 11/13/01
3
FAN5066
PRODUCT SPECIFICATION
Table 1. DAC Output Voltage Programming Codes
VID4
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
VID3
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
VID2
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
VID1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
VREF
1.30V
1.40V
1.50V
1.60V
1.70V
1.80V
1.90V
2.00V
No Output
2.2V
2.4V
2.6V
2.8V
3.0V
3.2V
3.4V
Note:
1. 0 = processor pin is tied to GND.
1 = processor pin is open.
4
REV. 2.1.4 11/13/01
PRODUCT SPECIFICATION
FAN5066
Typical Operating Characteristics
(VCCA, VCCD = 5V, f
OSC
= 280 KHz, and T
A
= +25
°
C using circuit in Figure 1, unless otherwise noted)
Efficiency vs. Output Current
80
70
Efficiency (%)
0.895
0.890
Load Regulation VOUT = 0.9V
V
OUT
(V)
60
50
40
30
20
0.1 0.3
0.885
0.880
0.875
0.870
0
0.5
1
1.5
2
2.5
3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3
Output Current (A)
Output Current (A)
Output Voltage vs. Output Current,
R
SENSE
= 6mΩ
1.4
1250
1.2
1.0
1050
850
650
450
250
50
0
1
2
3
4
5
18
Oscillator Frequency vs. C
EXT
0.8
0.6
0.4
0.2
0
Frequency (KHz)
V
OUT
(V)
39
75
150
300
560
Output Current (A)
C
EXT
(pf)
REV. 2.1.4 11/13/01
5
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