Freescale Semiconductor
Product Brief
Document Number:K20PB
Rev. 11, 08/2012
Supports all K20 devices
K20 Family Product Brief
Contents
1 Kinetis Portfolio
Kinetis is the most scalable portfolio of low power, mixed-
signal ARM
®
Cortex
™
-M4 MCUs in the industry. Phase 1 of
the portfolio consists of five MCU families with over 200 pin-,
peripheral- and software-compatible devices. Each family
offers excellent performance, memory and feature scalability
with common peripherals, memory maps, and packages
providing easy migration both within and between families.
Kinetis MCUs are built from Freescale’s innovative 90nm
Thin Film Storage (TFS) flash technology with unique
FlexMemory. Kinetis MCU families combine the latest low-
power innovations and high performance, high precision
mixed-signal capability with a broad range of connectivity,
human-machine interface, and safety & security peripherals.
Kinetis MCUs are supported by a market-leading enablement
bundle from Freescale and numerous ARM 3rd party
ecosystem partners.
1
2
3
4
5
6
7
Kinetis Portfolio........................................................1
K20 Family Introduction...........................................3
K20 Block Diagram..................................................3
Features.....................................................................5
Power modes...........................................................46
Developer Environment...........................................48
Revision History.....................................................54
© 2012–2013 Freescale Semiconductor, Inc.
Kinetis Portfolio
Family
Program
Flash
Packages
196-256pin
100-256pin
64-144pin
64-144pin
64-144pin
32-144pin
32-144pin
Mixed signal
USB
Operational &
transimpedance
amplifiers
Key Features
K70 Family
512KB-1MB
K6x Family
256KB-1MB
K5x Family
128-512KB
K40 Family
K30 Family
K20 Family
K10 Family
64-512KB
64-512KB
32KB-1MB
32KB-1MB
Low power
Segment LCD
DDR
Ethernet
Graphic LCD
Encryption and Tamper Detect
Figure 1. Kinetis MCU portfolio
All Kinetis families include a powerful array of analog, communication and timing and control peripherals with the level of
feature integration increasing with flash memory size and the number of inputs/outputs. Some of the available features in
Kinetis families include:
• Core:
• ARM Cortex-M4 Core delivering 1.25 DMIPS/MHz with DSP instructions (floating-point unit available on
certain Kinetis families)
• Up to 32-channel DMA for peripheral and memory servicing with minimal CPU intervention
• Broad range of performance levels rated at maximum CPU frequencies of 50 MHz, 72 MHz, 100 MHz, 120
MHz, and 150 MHz
• Ultra-low power:
• Multiple low power operating modes for optimizing peripheral activity and wake-up times for extended battery
life.
• Low–leakage wake-up unit, low power timer, and low power RTC for additional low power flexibility
• Industry-leading fast wake-up times
• Memory:
• Scalable memory footprints from 32 KB flash / 8 KB RAM to 1 MB flash / 128 KB RAM. Independent flash
banks enable concurrent code execution and firmware updates
• Optional 16 KB cache memory for optimizing bus bandwidth and flash execution performance. Offered on K10,
K20, and K60 family devices with CPU performance of up to 150 MHz.
• FlexMemory with up to 512 KB FlexNVM and up to 16 KB FlexRAM. FlexNVM can be partitioned to support
additional program flash memory (ex. bootloader), data flash (ex. storage for large tables), or EEPROM backup.
FlexRAM supports EEPROM byte-write/byte-erase operations and dictates the maximum EEPROM size.
• EEPROM endurance capable of exceeding 10 million cycles
K20 Family Product Brief, Rev. 11, 08/2012
2
Freescale Semiconductor, Inc.
K20 Family Introduction
•
•
•
•
•
•
• EEPROM erase/write times an order of magnitude faster than traditional EEPROM
• Multi-function external bus interface capable of interfacing to external memories, gate-array logic
Mixed-signal analog:
• Fast, high precision 16-bit ADCs, 12-bit DACs, high speed comparators and an internal voltage reference.
Powerful signal conditioning, conversion and analysis capability with reduced system cost
Human Machine Interface (HMI):
• Capacitive Touch Sensing Interface with full low-power support and minimal current adder when enabled
Connectivity and Communications:
• UARTs with ISO7816, CEA709.1-B (LON), and IrDA support, I2S, CAN, I2C and DSPI
• Full-speed USB OTG controller with on-chip transceiver
Reliability, Safety and Security:
• Hardware cyclic redundancy check engine for validating memory contents/communication data and increased
system reliability
• Independent-clocked computer operating properly (COP) for protection against code runaway in fail-safe
applications
• External watchdog monitor
• Tamper Detect secure key storage with internal/external tamper detect for unsecured flash, temperature/clock/
supply voltage variations, and physical attack
• Hardware Cryptographic Acceleration Unit (CAU) for secure data transfer and storage. Faster than software
implementations and with minimal CPU loading. Supports a wide variety of algorithms such as DES, 3DES,
AES, MD5, SHA-1, and SHA-256
• Random Number Generator (RNG) supports the key generation algorithm defined in the Digital Signature
Standard
Timing and Control:
• Powerful FlexTimers which support general purpose, PWM, and motor control functions
• Carrier Modulator Transmitter for IR waveform generation
• Programmable Interrupt Timer for RTOS task scheduler time base or trigger source for ADC conversion and
programmable delay block
System:
• 5 V tolerant GPIO with pin interrupt functionality
• Wide operating voltage range from 1.71 V to 3.6 V with flash programmable down to 1.71 V with fully
functional flash and analog peripherals
• Ambient operating temperature ranges from -40 °C to 105 °C
2 K20 Family Introduction
The K20 MCU family is pin, peripheral and software compatible with the K10 MCU family and adds full and high-speed
USB 2.0 On-The-Go with device charger detect capability. Devices start from 32 KB of flash in 5 x 5 mm 32QFN packages
extending up to 1 MB in a 144MAPBGA package with a rich suite of analog, communication, security, timing and control
peripherals. High memory density K20 family devices include a single precision floating point unit and NAND flash
controller.
The K22 product family members are additional devices within the K20 family with lower power and higher memory
densities in smaller packages. The K21 family adds Tamper functionality to the K22 device. Within the K21 and K22
families, devices range from 128 KB of flash memory to 512 KB of flash memory. Package options include 48 LQFP up to
121 MAPBGA.
3 K20 Block Diagram
The below figure shows a superset block diagram of the K20/K21/K22 device. Other devices within the family have a subset
of the features.
K20 Family Product Brief, Rev. 11, 08/2012
Freescale Semiconductor, Inc.
3
K20 Block Diagram
Kinetis K20 Family
ARM
®
Cortex™-M4
Core
System
Internal
and external
watchdogs
Debug
interfaces
Interrupt
controller
DSP
DMA
Memories and Memory Interfaces
Program
flash
Clocks
Phase-
locked loop
Frequency-
locked loop
Low/high
frequency
oscillators
RAM
FlexMemory
Serial
programming
interface
Low-leakage
wakeup
Internal
reference
clocks
and Integrity
CRC
Random
number
generator
Hardware
encryption
Tamper
detect
Security
Analog
16-bit ADC
Timers
Timers
x3 (16ch)
Communication Interfaces
I
C
x2
UART
x4
SPI
x2
2
Human-Machine
Interface (HMI)
GPIO
I
S
x1
USB OTG
LS/FS/HS
2
Analog
comparator
x2
6-bit DAC
x2
12-bit DAC
Carrier
modulator
transmitter
Programmable
TSI
delay block
USB LS/FS
transceiver
USB charger
detect
USB voltage
regulator
Periodic
interrupt
timers
Low power
timer
Voltage
reference
Independent
real-time
clock
LEGEND
Migration difference from K11/12D family
Figure 2. K20 Block Diagram
K20 Family Product Brief, Rev. 11, 08/2012
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Freescale Semiconductor, Inc.
Features
4 Features
4.1 Common features among the K20 family
All devices within the K20 family features the following at a minimum:
Table 1. Common features among all K20 devices
Operating characteristics
•
•
•
•
•
•
•
•
•
Voltage range 1.71V - 3.6V
Flash memory programming down to 1.71V
Temperature range (T
A
) -40 to 105°C
Flexible modes of operation
Next generation 32-bit ARM Cortex-M4 core
Supports DSP instructions
Nested vectored interrupt controller (NVIC)
Asynchronous wake-up interrupt controller (AWIC)
Debug & trace capability
• 2-pin serial wire debug (SWD)
• IEEE 1149.1 Joint Test Action Group (JTAG)
• IEEE 1149.7 compact JTAG (cJTAG)
• Trace port interface unit (TPIU)
• Flash patch and breakpoint (FPB)
• Data watchpoint and trace (DWT)
• Instrumentation trace macrocell (ITM)
Core features
System and power management
• Software and hardware watchdog with external monitor
pin
• DMA controller
• Low-leakage wake-up unit (LLWU)
• Power management controller with 10 different power
modes
• Non-maskable interrupt (NMI)
• 128-bit unique identification (ID) number per chip
• Multi-purpose clock generator
• PLL and FLL operation
• Internal reference clocks
• 3MHz to 32MHz crystal oscillator
• 32kHz to 40kHz crystal oscillator
• Internal 1kHz low power oscillator
• DC to 50MHz external square wave input clock
• FlexMemory consisting of FlexNVM (non-volatile flash
memory that can execute program code, store data, or
backup EEPROM data) or FlexRAM (RAM memory that
can be used as traditional RAM or as high-endurance
EEPROM storage, and also accelerates flash
programming)
• Flash security and protection features
• Serial flash programming interface (EzPort)
• Cyclic redundancy check (CRC)
• 16-bit SAR ADC
• High-speed Analog comparator (CMP) with 6-bit DAC
Table continues on the next page...
Clocks
Memories and Memory Interfaces
Security and integrity
Analog
K20 Family Product Brief, Rev. 11, 08/2012
Freescale Semiconductor, Inc.
5
FPGA/CPLD
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