MC74LVX132
Quad 2-Input NAND
Schmitt Trigger
The MC74LVX132 is an advanced high speed CMOS Schmitt
NAND trigger fabricated with silicon gate CMOS technology.
Pin configuration and function are the same as the MC74LVX00,
but the inputs have hysteresis.
The internal circuit is composed of multiple stages, including
a buffer output which provides high noise immunity and stable output.
The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
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•
•
•
•
•
•
•
SOIC−14 NB
D SUFFIX
CASE 751A
TSSOP−14
DT SUFFIX
CASE 948G
High Speed: t
PD
= 5.8 ns (Typ) at V
CC
= 3.3 V
Low Power Dissipation: I
CC
= 2
mA
(Max) at T
A
= 25°C
Power Down Protection Provided on Inputs
Low Noise: V
OLP
= 0.5 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
•
These Devices are Pb−Free and are RoHS Compliant
A1
1
3
B1
2
Y1
PIN ASSIGNMENT
V
CC
14
B4
13
A4
12
Y4
11
B3
10
A3
9
Y3
8
1
A1
2
B1
3
Y1
4
A2
5
B2
6
Y2
7
GND
14−Lead
(Top View)
MARKING DIAGRAMS
14
A2
4
6
Y2
1
LVX132G
AWLYWW
B2
5
SOIC−14 NB
A3
9
8
B3
10
1
TSSOP−14
11
B4
13
Y4
LVX132
A
WL, L
Y
WW, W
G or
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Y3
14
LVX
132
ALYWG
G
12
A4
Figure 1. Logic Diagram
FUNCTION TABLE
A Input
L
L
H
H
B Input
L
H
L
H
Y Output
H
H
H
L
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2014
1
August, 2014 − Rev. 4
Publication Order Number:
MC74LVX132/D
MC74LVX132
MAXIMUM RATINGS
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
T
STG
T
L
T
J
q
JA
P
D
MSL
F
R
V
ESD
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Sink Current
DC Supply Current per Supply Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
Power Dissipation in Still Air at 85_C
Moisture Sensitivity
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 30% − 35%
Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
Above V
CC
and Below GND at 85_C (Note 4)
SOIC
TSSOP
SOIC
TSSOP
V
I
< GND
V
O
< GND
Parameter
Value
−0.5 to
)7.0
−0.5 to
)7.0
−0.5 to V
CC
)0.5
−20
±20
±25
±50
−65 to
)150
260
)150
250
250
Level 1
UL 94−V0 @ 0.125 in
> 2000
> 200
N/A
±300
V
Unit
V
V
V
mA
mA
mA
mA
_C
_C
_C
_C/W
mW
I
Latchup
Latchup Performance
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Tested to EIA/JESD22−A114−A.
2. Tested to EIA/JESD22−A115−A.
3. Tested to JESD22−C101−A.
4. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
A
Dt/DV
Supply Voltage
Input Voltage
Output Voltage
Operating Free−Air Temperature
Input Transition Rise or Fall Rate
V
CC
= 3.0 V
$0.3
V
(Note 5)
(HIGH or LOW State)
Parameter
Min
2.0
0
0
*40
0
Max
3.6
5.5
5.5
)125
100
Unit
V
V
V
_C
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.
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MC74LVX132
DC ELECTRICAL CHARACTERISTICS
V
CC
V
2.0
3.0
3.6
2.0
3.0
3.6
2.0
3.0
3.6
I
OH
= − 50
mA
I
OH
= − 50
mA
I
OH
= − 4 mA
I
OL
= 50
mA
I
OL
= 50
mA
I
OL
= 4 mA
V
in
= 5.5 V or
GND
V
in
= V
CC
or GND
2.0
3.0
3.0
2.0
3.0
3.0
3.6
3.6
T
A
= 25°C
Min
1.15
1.50
1.70
0.30
0.75
1.00
0.30
0.30
0.35
1.9
2.9
2.58
Typ
1.31
1.82
2.12
0.64
1.13
1.46
0.70
0.76
0.69
2.0
3.0
0.0
0.0
0.1
0.1
0.36
±0.1
2.0
Max
1.60
2.25
2.60
0.9
1.45
1.90
1.30
1.50
1.60
T
A
=
≤
85°C
Min
1.15
1.50
1.70
0.30
0.75
1.00
0.30
0.30
0.35
1.9
2.9
2.48
0.1
0.1
0.44
±1.0
20
Max
1.60
2.25
2.60
0.90
1.45
1.90
1.30
1.50
1.60
T
A
=
≤
125°C
Min
1.15
1.50
1.70
0.30
0.75
1.00
0.30
0.30
0.35
1.9
2.9
2.34
0.1
0.1
0.52
±1.0
20
Max
1.60
2.25
2.60
0.90
1.45
1.90
1.30
1.50
1.60
Unit
V
Symbol
V
T+
Parameter
Positive Threshold Voltage
(Figure 4)
Negative Threshold Voltage
(Figure 4)
Hysteresis Voltage
(Figure 4)
Minimum High−Level Output
Voltage
V
IN
= V
IH
or V
IL
Maximum Low−Level Output
Voltage
V
IN
= V
IH
or V
IL
Maximum Input Leakage
Current
Maximum Quiescent Supply
Current
Test Conditions
V
T−
V
V
H
V
V
OH
V
V
OL
V
I
in
I
CC
mA
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0ns)
T
A
= 25°C
Symbol
t
PLH
,
t
PHL
Parameter
Maximum Propagation
Delay,
A or B to Y
Test Conditions
V
CC
= 2.7V
V
CC
= 3.3
±
0.3V
V
CC
= 2.7V
V
CC
= 3.3
±
0.3V
C
L
= 15pF
C
L
= 50pF
C
L
= 15pF
C
L
= 50pF
C
L
= 50pF
C
L
= 50pF
4
Min
Typ
7.0
10.0
5.8
8.3
Max
11.0
16.0
10.6
15.4
1.5
1.5
10
T
A
=
≤
85°C
Min
1.0
1.0
1.0
1.0
Max
13.0
18.7
12.5
17.5
1.5
1.5
10
T
A
=
≤
125°C
Min
1.0
1.0
1.0
1.0
Max
15.0
20.0
14.5
19.5
1.5
1.5
10
pF
ns
Unit
ns
t
OSHL
,
t
OSLH
C
in
Output to Output Skew
(Note 6)
Maximum Input
Capacitance
Typical @ 25°C, V
CC
= 5.0 V
C
PD
Power Dissipation Capacitance (Note 6)
11
pF
6. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/ 4 (per gate). C
PD
is used to determine the
no−load dynamic power consumption; P
D
= C
PD
V
CC2
f
in
+ I
CC
V
CC
.
NOISE CHARACTERISTICS
(Input t
r
= t
f
= 3.0ns, C
L
= 50pF, V
CC
= 5.0 V)
T
A
= 25°C
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
Characteristic
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
Typ
0.3
−0.3
Max
0.5
−0.5
2.0
0.8
Unit
V
V
V
V
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MC74LVX132
V
CC
A
50%
GND
t
PLH
Y
50% V
CC
t
PHL
Figure 2. Switching Waveforms
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
C
L
*
*Includes all probe and jig capacitance
Figure 3. Test Circuit
VT , TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS)
4
3
2
(V
T+
)
V
H
typ
(V
T-
)
1
2
2.5
3
3.5
V
CC
, POWER SUPPLY VOLTAGE (VOLTS)
V
H
typ = (V
T+
typ) - (V
T-
typ)
4
Figure 4. Typical Input Threshold, V
T+
, V
T−
versus Power Supply Voltage
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4
MC74LVX132
V
H
V
in
V
CC
V
T+
V
T-
GND
V
OH
V
in
V
H
V
CC
V
T+
V
T-
GND
V
OH
V
out
V
OL
(a) A Schmitt-Trigger Squares Up Inputs With Slow Rise and Fall Times
V
out
V
OL
(b) A Schmitt-Trigger Offers Maximum Noise Immunity
Figure 5. Typical Schmitt−Trigger Applications
INPUT
Figure 6. Input Equivalent Circuit
ORDERING INFORMATION
Device
MC74LVX132DR2G
MC74LVX132DTG
MC74LVX132DTR2G
Package
SOIC−14 NB
(Pb−Free)
TSSOP−14
(Pb−Free)
TSSOP−14
(Pb−Free)
Shipping
†
2500 Tape & Reel
96 Units / Rail
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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