MC74VHCT139A
Dual 2-to-4 Decoder/
Demultiplexer
The MC74VHCT139A is an advanced high speed CMOS 2−to−4
decoder/demultiplexer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar
Schottky TTL devices while maintaining CMOS low power
dissipation.
When the device is enabled (E = low), it can be used for gating or as
a data input for demultiplexing operations. When the enable input is
held high, all four outputs are fixed high, independent of other inputs.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device output is compatible with TTL−type input thresholds
and the output has a full 5.0 V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the
input, allowing the device to be used as a logic−level translator from
3.0 V CMOS logic to 5.0 V CMOS logic, or from 1.8 V CMOS logic
to 3.0 V CMOS logic while operating at the high−voltage power
supply
The MC74VHCT139A input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHCT139A to be used to interface 5.0 V circuits to
3.0 V circuits. The output structures also provide protection when
V
CC
= 0 V. These input and output structures help prevent device
destruction caused by supply voltage−input/output voltage mismatch,
battery backup, hot insertion, etc.
Features
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MARKING
DIAGRAMS
16
SOIC−16
D SUFFIX
CASE 751B
1
1
VHCT139AG
AWLYWW
16
TSSOP−16
DT SUFFIX
CASE 948F
1
1
16
SOEIAJ−16
M SUFFIX
CASE 966
1
1
74VHCT139
ALYWG
VHCT
139A
ALYWG
G
•
•
•
•
•
•
•
•
•
•
High Speed: t
PD
= 5.0 ns (Typ) at V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 4
mΑ
(Max) at T
A
= 25°C
TTL−Compatible Inputs: V
IL
= 0.8 V; V
IH
= 2.0 V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: V
OLP
= 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
•
Chip Complexity: 100 FETs or 25 Equivalent Gates
•
These Devices are Pb−Free and are RoHS Compliant
A
= Assembly Location
WL, L
= Wafer Lot
Y
= Year
WW, W = Work Week
G or
G
= Pb−Free Package
(Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
E
H
L
L
L
L
A1
X
L
L
H
H
A0
X
L
H
L
H
Y0
H
L
H
H
H
Outputs
Y1 Y2
H
H
L
H
H
H
H
H
L
H
Y3
H
H
H
H
L
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2011
May, 2011
−
Rev. 5
1
Publication Order Number:
MC74VHCT139A/D
MC74VHCT139A
ADDRESS
INPUTS
Ea
A0a
A1a
Y0a
Y1a
Y2a
Y3a
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
Eb
A0b
A1b
Y0b
Y1b
Y2b
Y3b
ADDRESS
INPUTS
A0b
A1b
14
13
12
11
10
9
Y0b
Y1b
Y2b
Y3b
ACTIVE-LOW
OUTPUTS
Ea
1
A0a
A1a
2
3
4
5
6
7
Y0a
Y1a
Y2a
Y3a
ACTIVE-LOW
OUTPUTS
Figure 1. Pin Assignment
Eb
15
Figure 2. Logic Diagram
En
Y0
Y1
A0
Y2
Y3
A1
Figure 3. Expanded Logic Diagram
(1/2 of Device)
A1a
A0a
Ea
INPUT
3
2
1
X/Y
1
2
EN
0
1
2
3
4 Y0a
5 Y1a
6 Y2a
7 Y3a
12 Y0b
11 Y1b
10 Y2b
9 Y3b
A1a
A0a
Ea
3
2
1
0
1
DMUX
0
0
G
3
1
2
3
4 Y0a
5 Y1a
6 Y2a
7 Y3a
12 Y0b
11 Y1b
10 Y2b
9 Y3b
A1b 13
A0b 14
Eb 15
A1b 13
A0b 14
Eb 15
Figure 4. Input Equivalent Circuit
Figure 5. IEC Logic Diagram
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2
MC74VHCT139A
MAXIMUM RATINGS
(Note 1)
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
STG
V
ESD
Positive DC Supply Voltage
Digital Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation in Still Air
Storage Temperature Range
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
Above V
CC
and Below GND at 125°C (Note 5)
SOIC Package
TSSOP
SOIC Package
TSSOP
Output in 3−State
High or Low State
Parameter
Value
−0.5
to +7.0
−0.5
to +7.0
−0.5
to +7.0
−0.5
to V
CC
+0.5
−20
$20
$25
$75
200
180
−65
to +150
>2000
>200
>2000
$300
143
164
Unit
V
V
V
mA
mA
mA
mA
mW
°C
V
I
LATCHUP
q
JA
Latchup Performance
mA
°C/W
Thermal Resistance, Junction−to−Ambient
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
2. Tested to EIA/JESD22−A114−A
3. Tested to EIA/JESD22−A115−A
4. Tested to JESD22−C101−A
5. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
V
OUT
T
A
t
r
, t
f
DC Supply Voltage
DC Input Voltage
DC Output Voltage Output in 3−State
High or Low State
Operating Temperature Range, all Package Types
Input Rise or Fall Time
V
CC
= 5.0 V + 0.5 V
Characteristics
Min
4.5
0
0
0
−55
0
Max
5.5
5.5
5.5
V
CC
125
20
Unit
V
V
V
°C
ns/V
DEVICE JUNCTION TEMPERATURE VERSUS TIME
TO 0.1% BOND FAILURES
NORMALIZED FAILURE RATE
Junction
Temperature
°C
80
90
100
110
120
130
140
Time, Hours
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
Time, Years
117.8
47.9
20.4
9.4
4.2
2.0
1.0
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 130
°
C
TJ = 120
°
C
TJ = 100
°
C
TJ = 110
°
C
TJ = 80
°
C
100
TIME, YEARS
TJ = 90
°
C
1
1
10
1000
Figure 6. Failure Rate vs. Time Junction Temperature
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3
MC74VHCT139A
DC CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum High−Level Input
Voltage
Maximum Low−Level Input
Voltage
Maximum High−Level
Output Voltage
V
IN
= V
IH
or V
IL
I
OH
=
−50
mA
V
IN
= V
IH
or V
IL
I
OH
=
−8
mA
V
OL
Maximum Low−Level
Output Voltage
V
IN
= V
IH
or V
IL
I
OL
= 50
mA
V
IN
= V
IH
or V
IL
I
OH
= 8 mA
I
IN
I
CC
I
CCT
Input Leakage Current
Maximum Quiescent
Supply Current
Additional Quiescent
Supply Current (per Pin)
V
IN
= 5.5 V or GND
V
IN
= V
CC
or GND
Any one input:
V
IN
= 3.4 V
All other inputs:
V
IN
= V
CC
or GND
V
OUT
= 5.5 V
Condition
(V)
4.5 to 5.5
4.5 to 5.5
Min
2
0.8
T
A
= 25°C
Typ
Max
T
A
≤
85°C
Min
2
0.8
Max
T
A
=
−
55 to
125°C
Min
2
0.8
Max
Unit
V
V
V
4.5
4.5
4.5
4.5
0 to 5.5
5.5
5.5
4.4
3.94
4.5
4.4
3.8
4.4
3.66
0.1
0.44
±1.0
40.0
1.5
0.1
0.52
±1.0
40.0
1.5
0
0.1
0.36
±0.1
4.0
1.35
V
mA
mA
mA
I
OPD
Output Leakage Current
0
0.5
5
5
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î
Î
Î
ÎÎ Î Î Î Î Î Î Î
Î
Î
Î
Î Î Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î
Î
Î
ÎÎ Î Î Î Î Î Î Î
Î
Î
Î
Î Î Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î Î Î Î Î Î Î Î
Î Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î
ÎÎ Î Î Î Î Î Î Î
Î
Î
Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0ns)
T
A
= 25°C
Typ
7.2
9.7
5.0
6.5
6.4
8.9
4.4
5.9
4
T
A
≤
85°C
T
A
=
−
55 to
125°C
Symbol
t
PLH
,
t
PHL
Parameter
Test Conditions
Min
Max
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
Unit
ns
Maximum Propagation
Delay, A to Y
V
CC
= 3.3
±
0.3 V
V
CC
= 5.0
±
0.5 V
V
CC
= 3.3
±
0.3 V
V
CC
= 5.0
±
0.5 V
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
11.0
14.5
7.2
9.2
13.0
16.5
13.0
16.5
8.5
10.5
8.5
10.5
t
PLH
,
t
PHL
Maximum Propagation
Delay, E to Y
9.2
12.7
6.3
8.3
10
11.0
14.5
7.5
9.5
10
11.0
14.5
7.5
9.5
10
ns
C
IN
Maximum Input
Capacitance
pF
Typical @ 25°C, V
CC
= 5.0V
26
C
PD
Power Dissipation Capacitance (Note 6)
pF
6. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/2 (per decoder). C
PD
is used to determine the
no−load dynamic power consumption; P
D
= C
PD
V
CC2
f
in
+ I
CC
V
CC
.
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4
MC74VHCT139A
3.0 V
A
t
PLH
Y
1.5 V
V
OL
1.5 V
GND
t
PHL
V
OH
Y
1.5 V
E
1.5 V
t
PHL
t
PLH
3.0 V
GND
V
OH
V
OL
Figure 7. Switching Waveform
Figure 8. Switching Waveform
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
C
L
*
*Includes all probe and jig capacitance
Figure 9. Test Circuit
ORDERING INFORMATION
Device
MC74VHCT139ADG
MC74VHCT139ADR2G
MC74VHCT139ADTG
MC74VHCT139ADTRG
MC74VHCT139AMG
MC74VHCT139AMELG
Package
SOIC−16
(Pb−Free)
SOIC−16
(Pb−Free)
TSSOP−16*
TSSOP−16*
SOEIAJ−16
(Pb−Free)
SOEIAJ−16
(Pb−Free)
Shipping
†
48 Units / Rail
2500 Tape & Reel
96 Units / Rail
2500 Tape & Reel
50 Units / Rail
2000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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