SRAM Chip Async Single 2.5V/3.3V 8M-bit 1M x 8 55ns 44-Pin TSOP-II T/R
参数名称 | 属性值 |
欧盟限制某些有害物质的使用 | Compliant |
ECCN (US) | EAR99 |
Part Status | Active |
HTS | 8542.32.00.41 |
Chip Density (bit) | 8M |
Number of Words | 1M |
Number of Bits/Word (bit) | 8 |
Data Rate Architecture | SDR |
Address Bus Width (bit) | 20 |
Number of Ports | 1 |
Timing Type | Asynchronous |
Max. Access Time (ns) | 55 |
Minimum Operating Supply Voltage (V) | 2.4 |
Typical Operating Supply Voltage (V) | 3.3|2.5 |
Maximum Operating Supply Voltage (V) | 3.6 |
Operating Current (mA) | 25 |
Minimum Operating Temperature (°C) | -40 |
Maximum Operating Temperature (°C) | 85 |
Supplier Temperature Grade | Industrial |
系列 Packaging | Tape and Reel |
Supplier Package | TSOP-II |
Pin Count | 44 |
Standard Package Name | SOP |
Mounting | Surface Mount |
Package Height | 1.05(Max) |
Package Length | 18.52(Max) |
Package Width | 10.29(Max) |
PCB changed | 44 |
Lead Shape | Gull-wing |
IS62WV10248DBLL-55TLI-TR | IS62WV10248DBLL-55MLI-TR | |
---|---|---|
描述 | SRAM Chip Async Single 2.5V/3.3V 8M-bit 1M x 8 55ns 44-Pin TSOP-II T/R | SRAM 8M (1Mx8) 55ns Async SRAM |
系列 Packaging |
Tape and Reel | Reel |
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