VS-ST1000C..K Series
www.vishay.com
Vishay Semiconductors
Phase Control Thyristors
(Hockey PUK Version), 1473 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case K-PUK (A-24)
• High profile hockey PUK
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
K-PUK (A-24)
TYPICAL APPLICATIONS
• DC motor controls
• Controlled DC power supplies
1473 A
PRIMARY CHARACTERISTICS
I
T(AV)
V
DRM
/V
RRM
V
TM
I
GT
T
J
Package
Circuit configuration
1200 V, 1400 V, 1600 V, 1800 V,
2000 V, 2200 V, 2400 V
1.80 V
100 mA
-40 °C to +125 °C
K-PUK (A-24)
Single SCR
• AC controllers
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
I
T(AV)
I
T(RMS)
I
TSM
I
2
t
I
2
t
V
DRM
/V
RRM
t
q
T
J
Range
Typical
Range
T
hs
T
hs
50 Hz
60 Hz
50 Hz
60 Hz
TEST CONDITIONS
VALUES
1473
55
2913
25
20.0
21.2
2000
1865
20 000
1200 to 2400
300
-40 to +125
UNITS
A
°C
A
°C
A
kA
2
s
kA
2
s
V
μs
°C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VOLTAGE
CODE
12
14
16
VS-ST1000C..K
18
20
22
24
V
RRM
, MAXIMUM REPETITIVE PEAK
REVERSE VOLTAGE
V
1200
1400
1600
1800
2000
2200
2400
V
RSM
, MAXIMUM
NON-REPETITIVE PEAK REVERSE
VOLTAGE
V
1300
1500
1700
1900
2100
2300
2500
100
I
RRM
MAXIMUM
AT T
J
= 125 °C
mA
Revision: 21-Sep-17
Document Number: 93714
1
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST1000C..K Series
www.vishay.com
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current
SYMBOL
I
T(AV)
I
T(RMS)
TEST CONDITIONS
180° conduction, half sine wave
Double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
Maximum peak, one-cycle,
non-repetitive surge current
I
TSM
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
Maximum I
2
t for fusing
I
2
t
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Maximum I
2
t
for fusing
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage drop
Maximum holding current
Typical latching current
I
2
t
V
T(TO)1
V
T(TO)2
r
t1
r
t2
V
TM
I
H
I
L
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
reapplied
100 % V
RRM
reapplied
VALUES
1473 (630)
55 (85)
6540
20.0
21.2
17.0
Sinusoidal half wave,
initial T
J
= T
J
maximum
18.1
2000
1865
1445
1360
20 000
0.950
1.024
0.283
0.265
1.80
600
1000
kA
2
s
V
kA
2
s
kA
UNITS
A
°C
A
t = 0.1 ms to 10 ms, no voltage reapplied
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
I
pk
= 3000 A, T
J
= 125 °C, t
p
= 10 ms sine pulse
T
J
= 25 °C, anode supply 12 V resistive load
m
V
mA
SWITCHING
PARAMETER
Maximum non-repetitive rate of
rise of turned-on current
Typical delay time
Typical turn-off time
SYMBOL
dI/dt
t
d
t
q
TEST CONDITIONS
Gate drive 20 V, 20
,
t
r
1 μs
T
J
= T
J
maximum, anode voltage
80 % V
DRM
Gate current 1 A, dI
g
/dt = 1 A/μs
V
d
= 0.67 % V
DRM
, T
J
= 25 °C
I
TM
= 550 A, T
J
= T
J
maximum, dI/dt = 40 A/μs,
V
R
= 50 V, dV/dt = 20 V/μs, gate 0 V 100
,
t
p
= 500 μs
VALUES
1000
1.9
μs
300
UNITS
A/μs
BLOCKING
PARAMETER
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and
off-state leakage current
SYMBOL
dV/dt
I
RRM
,
I
DRM
TEST CONDITIONS
T
J
= T
J
maximum linear to 80 % rated V
DRM
T
J
= T
J
maximum, rated V
DRM
/V
RRM
applied
VALUES
500
100
UNITS
V/μs
mA
Revision: 21-Sep-17
Document Number: 93714
2
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST1000C..K Series
www.vishay.com
Vishay Semiconductors
TRIGGERING
PARAMETER
Maximum peak gate power
Maximum peak average gate power
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
SYMBOL
P
GM
P
G(AV)
I
GM
+V
GM
-V
GM
T
J
= -40 °C
DC gate current required to trigger
I
GT
T
J
= 25 °C
T
J
= 125 °C
T
J
= -40 °C
DC gate voltage required to trigger
V
GT
T
J
= 25 °C
T
J
= 125 °C
DC gate current not to trigger
I
GD
T
J
= T
J
maximum
DC gate voltage not to trigger
V
GD
Maximum gate current/voltage
not to trigger is the maximum
value which will not trigger any
unit with rated V
DRM
anode to
cathode applied
Maximum required gate trigger/
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
200
100
50
1.4
1.1
0.9
10
T
J
= T
J
maximum, t
p
5 ms
TEST CONDITIONS
T
J
= T
J
maximum, t
p
5 ms
T
J
= T
J
maximum, f = 50 Hz, d% = 50
VALUES
TYP.
MAX.
16
3
3.0
20
5.0
-
200
-
-
3.0
-
mA
V
mA
UNITS
W
A
V
0.25
V
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Maximum operating temperature range
Maximum storage temperature range
Maximum thermal resistance,
junction to heatsink
Maximum thermal resistance,
case to heatsink
Mounting force, ± 10 %
Approximate weight
Case style
See dimensions - link at the end of datasheet
SYMBOL
T
J
T
Stg
R
thJ-hs
R
thC-hs
DC operation single side cooled
DC operation double side cooled
DC operation single side cooled
DC operation double side cooled
TEST CONDITIONS
VALUES
-40 to +125
-40 to +150
0.042
0.021
0.006
0.003
24 500
(2500)
425
K-PUK (A-24)
N
(kg)
g
K/W
UNITS
°C
R
thJC
CONDUCTION
CONDUCTION ANGLE
180°
120°
90°
60°
30°
SINUSOIDAL CONDUCTION
SINGLE SIDE
0.003
0.004
0.005
0.007
0.012
DOUBLE SIDE
0.003
0.004
0.005
0.007
0.012
RECTANGULAR CONDUCTION
SINGLE SIDE
0.002
0.004
0.005
0.007
0.012
DOUBLE SIDE
0.002
0.004
0.005
0.007
0.012
T
J
= T
J
maximum
K/W
TEST CONDITIONS
UNITS
Note
• The table above shows the increment of thermal resistance R
thJC
when devices operate at different conduction angles than DC
Revision: 21-Sep-17
Document Number: 93714
3
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST1000C..K Series
www.vishay.com
Vishay Semiconductors
Maximum Allowable Heatsink Temperature (°C)
130
120
110
100
90
80
70
60
50
40
0
400
800
1200
1600
2000
2400
Conduction Period
ST1000C..K series
(double side cooled)
R
thJ-hs
(DC) = 0.021 K/W
Maximum Allowable Heatsink Temperature (°C)
130
120
110
ST1000C..K series
( single side cooled)
R
thJ-hs
(DC ) = 0.042 K/W
Conduction Angle
100
90
80
70
0
100
200
300
400
500
600
700
30˚
60˚
90˚
120˚
180˚
DC
30°
60°
90°
120°
180°
Average On-State Current (A)
Average On-State Current (A)
Fig. 1 - Current Ratings Characteristics
Fig. 4 - Current Ratings Characteristics
Maximum Allowable Heatsink Temperature (°C)
Maximum Average On-State Power Loss (W)
130
120
110
Conduction Period
100
90
80
70
0
200
400
600
800
30°
ST1000C..K Series
( single side cooled)
R
thJ-hs
(DC ) = 0.042 K/W
3000
2500
2000
1500
1000
500
0
0
400
800
1200
1600
180˚
120˚
90˚
60˚
30˚
RMS limit
60°
90°
120°
180°
DC
1000
Conduction Angle
ST1000C..K series
T
J
= 125˚C
Average On-State Current (A)
Average On-State Current (A)
Fig. 2 - Current Ratings Characteristics
Fig. 5 - On-State Power Loss Characteristics
Maximum Allowable Heatsink Temperature (°C)
Maximum Average On-State Power Loss (W)
130
120
110
100
90
80
70
60
50
40
0
400
4000
3500
3000
2500
2000
1500
Conduction period
ST1000C..K Series
(double side cooled)
R
thJ-hs
(DC) = 0.021 K/W
DC
180˚
120˚
90˚
60˚
30˚
RMS limit
Conduction Angle
30˚
60˚
90˚
120˚
180˚
1000
500
0
0
500
1000
1500
2000
2500
ST1000C..K series
T
J
= 125 ˚C
800
1200
1600
Average On-State Current (A)
Average On-State Current (A)
Fig. 3 - Current Ratings Characteristics
Fig. 6 - On-State Power Loss Characteristics
Revision: 21-Sep-17
Document Number: 93714
4
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST1000C..K Series
www.vishay.com
Vishay Semiconductors
Peak Half Sine Wave On-state Current (A)
22 000
20 000
18 000
16 000
14 000
12 000
10 000
8000
Maximum non repetitive surge current
vs. pulse train duration.
Control of conduction may not be maintained.
Initial T
J
= 125 °C
No voltage reapplied
Rated V
RRM
reapplied
Peak Half Sine Wave On-state Current (A)
18 000
16 000
14 000
12 000
10 000
8000
At any rated load condition and with
rated V
RRM
applied following surge.
Initial T
J
= 125 ˚C
at 60 Hz 0.0083 s
at 50 Hz 0.0100 s
ST1000C..K series
6000
1
10
100
ST1000C..K series
6000
0.01
0.1
1
Number Of Equal Amplitude Half Cycle Current Pulses (N)
Pulse Train Duration (s)
Fig. 7 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
Fig. 8 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
10 000
Instantaneous On-State Current (A)
T
J
= 25 ˚C
T
J
= 125 ˚C
1000
ST1000C..K series
100
0.5
1
1.5
2
2.5
3
3.5
4
Instantaneous On-State Voltage (V)
Fig. 9 - On-State Voltage Drop Characteristics
Transient Thermal Impedance Z
thJ-hs
(K/W)
0.1
Steady state value
R
thJ-hs
= 0.42 K/W
(single side cooled)
R
thJ-hs
= 0.21 K/W
(double side cooled)
0.01
(DC operation)
ST1000C..K series
0.001
0.001
0.01
0.1
1
10
100
Square Wave Pulse Duration (s)
Fig. 10 - Thermal Impedance Z
thJ-hs
Characteristics
Revision: 21-Sep-17
Document Number: 93714
5
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
