MC10E101, MC100E101
5V ECL Quad 4-Input
OR/NOR Gate
Description
The MC10E/100E101 is a quad 4-input OR/NOR gate.
The 100 Series contains temperature compensation.
Features
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•
500 ps Max. Propagation Delay
•
PECL Mode Operating Range:
•
•
•
•
•
•
•
•
V
CC
= 4.2 V to 5.7 V with V
EE
= 0 V
NECL Mode Operating Range:
V
CC
= 0 V with V
EE
=
−4.2
V to
−5.7
V
Internal Input 50 kW Pulldown Resistors
ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level:
Pb = 1
Pb−Free = 3
Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 115 devices
Pb−Free Packages are Available*
PLCC−28
FN SUFFIX
CASE 776
MARKING DIAGRAM*
MCxxxE101FNG
AWLYYWW
xxx
A
WL
YY
WW
G
= 10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
November, 2006
−
Rev. 8
1
Publication Order Number:
MC10E101/D
MC10E101, MC100E101
D
3a
25
D
2d
D
2c
D
2b
V
EE
D
2a
D
1d
D
1c
26
27
28
1
D
3b
24
D
3c
23
D
3d
V
CCO
22
21
Q
3
20
Q
3
19
18
17
16
15
14
13
12
Q
2
Q
2
V
CC
Q
1
Q
1
Q
0
Q
0
D
0a
D
0b
D
0c
D
0d
D
1a
D
1b
D
1c
D
1d
D
2a
D
2b
D
2c
D
2d
D
3a
D
3b
D
3c
D
3d
Q
0
Q
0
Q
1
Q
1
2
3
4
5
D
1b
6
D
1a
7
D
0d
8
D
0c
9
D
0b
10
11
Q
2
Q
2
D
0a
V
CCO
Q
3
Q
3
All V
CC
and V
CCO
pins are tied together on the die.
Warning: All V
CC
, V
CCO,
and V
EE
pins must be externally
connected to Power Supply to guarantee proper operation.
Figure 2. Logic Diagram
Figure 1. 28−Lead Pinout: Assignment
(Top View)
Table 1. PIN DESCRIPTION
Pin
D
0a
−
D
3d
Q
0
−
Q3, Q
0
−
Q
3
V
CC
, V
CCO
V
EE
ECL Data Inputs
ECL Differential Outputs
Positive Supply
Negative Supply
Function
Table 2. MAXIMUM RATINGS
Symbol
V
CC
V
EE
V
I
I
out
T
A
T
stg
q
JA
q
JC
T
sol
Parameter
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Wave Solder
Pb
Pb−Free
0 lfpm
500 lfpm
Standard Board
PLCC−28
PLCC−28
PLCC−28
Condition 1
V
EE
= 0 V
V
CC
= 0 V
V
EE
= 0 V
V
CC
= 0 V
Continuous
Surge
V
I
v
V
CC
V
I
w
V
EE
Condition 2
Rating
8
−6
6
−6
50
100
0 to +85
−65
to +150
63.5
43.5
22 to 26
265
265
Unit
V
V
V
V
mA
mA
°C
°C
°C/W
°C/W
°C/W
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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2
MC10E101, MC100E101
Table 3. 10E SERIES PECL DC CHARACTERISTICS
V
CC
= 5.0 V, V
EE
= 0.0 V (Note 1)
−40°C
Symbol
I
EE
I
EE
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Characteristic
Power Supply Current
Power Supply Current
Output HIGH Voltage (Note 2)
Output LOW Voltage (Note 2)
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
0.5
0.3
3980
3050
3830
3050
Min
23
Typ
30
30
4070
3210
3995
3285
Max
40
36
4160
3370
4160
3520
150
0.5
0.25
4020
3050
3870
3050
Min
23
25°C
Typ
30
30
4105
3210
4030
3285
Max
40
36
4190
3370
4190
3520
150
0.3
0.2
4090
3050
3940
3050
Min
23
85°C
Typ
30
30
4185
3227
4110
3302
Max
40
36
4280
3405
4280
3555
150
Unit
mA
mA
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary
−0.46
V / +0.06 V.
2. Outputs are terminated through a 50
W
resistor to V
CC
−
2.0 V.
Table 4. 10E SERIES NECL DC CHARACTERISTICS
V
CCx
= 0.0 V; V
EE
=
−5.0
V (Note 3)
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 4)
Output LOW Voltage (Note 4)
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
0.5
0.3
−1020
−1950
−1170
−1950
Min
Typ
30
−930
−1790
−1005
−1715
Max
36
−840
−1630
−840
−1480
150
0.5
0.065
−980
−1950
−1130
−1950
Min
25°C
Typ
30
−895
−1790
−970
−1715
Max
36
−810
−1630
−810
−1480
150
0.3
0.2
−910
−1950
−1060
−1950
Min
85°C
Typ
30
−815
−1773
−890
−1698
Max
36
−720
−1595
−720
−1445
150
Unit
mA
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary
−0.46
V / +0.06 V.
4. Outputs are terminated through a 50
W
resistor to V
CC
−
2.0 V.
Table 5. 100E SERIES PECL DC CHARACTERISTICS
V
CCx
= 5.0 V; V
EE
= 0.0 V (Note 5)
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 6)
Output LOW Voltage (Note 6)
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
0.5
0.3
3975
3190
3835
3190
Min
Typ
30
4050
3295
3975
3355
Max
36
4120
3380
4120
3525
150
0.5
0.25
3975
3190
3835
3190
Min
25°C
Typ
30
4050
3255
3975
3355
Max
36
4120
3380
4120
3525
150
0.5
0.2
3975
3190
3835
3190
Min
85°C
Typ
35
4050
3260
3975
3355
Max
42
4120
3380
4120
3525
150
Unit
mA
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary
−0.46
V / +0.8 V.
6. Outputs are terminated through a 50
W
resistor to V
CC
−
2.0 V.
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MC10E101, MC100E101
Table 6. 100E SERIES NECL DC CHARACTERISTICS
V
CCx
= 0.0 V; V
EE
=
−5.0
V (Note 7)
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 8)
Output LOW Voltage (Note 8)
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
0.5
0.3
−1025
−1810
−1165
−1810
Min
Typ
30
−950
−1705
−1025
−1645
Max
36
−880
−1620
−880
−1475
150
0.5
0.25
−1025
−1810
−1165
−1810
Min
25°C
Typ
30
−950
−1745
−1025
−1645
Max
36
−880
−1620
−880
−1475
150
0.5
0.2
−1025
−1810
−1165
−1810
Min
85°C
Typ
35
−950
−1740
−1025
−1645
Max
42
−880
−1620
−880
−1475
150
Unit
mA
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
7. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary
−0.46
V / +0.8 V.
8. Outputs are terminated through a 50
W
resistor to V
CC
−
2.0 V.
Table 7. AC CHARACTERISTICS
V
CCx
= 5.0 V; V
EE
= 0.0 V or V
CCx
= 0.0 V; V
EE
=
−5.0
V (Note 9)
−40°C
Symbol
f
MAX
t
PLH
t
PHL
t
SKEW
t
JITTER
t
r
t
f
Characteristic
Maximum Toggle Frequency
Propagation Delay to Output
Within-Device Skew (Note 10)
Within-Gate Skew (Note 11)
Random Clock Jitter (RMS)
Rise/Fall Time
(20 - 80%)
275
D to Q
300
Min
Typ
700
450
50
25
<1
380
575
300
600
300
Max
Min
25°C
Typ
700
450
50
25
<1
380
575
275
600
300
Max
Min
85°C
Typ
700
450
50
25
<1
380
575
600
Max
Unit
MHz
ps
ps
ps
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
9. 10 Series: V
EE
can vary
−0.46
V / +0.06 V.
100 Series: V
EE
can vary
−0.46
V / +0.8 V.
10. Within-device skew is defined as identical transitions on similar paths through a device.
11. Within-gate skew is defined as the variation in propagation delays of a gate when driven from its different inputs.
Q
Driver
Device
Q
Z
o
= 50
W
D
Receiver
Device
Z
o
= 50
W
50
W
50
W
D
V
TT
V
TT
= V
CC
−
2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D
−
Termination of ECL Logic Devices.)
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MC10E101, MC100E101
ORDERING INFORMATION
Device
MC10E101FN
MC10E101FNG
MC10E101FNR2
MC10E101FNR2G
MC100E101FN
MC100E101FNG
MC100E101FNR2
MC100E101FNR2G
Package
PLCC−28
PLCC−28
(Pb−Free)
PLCC−28
PLCC−28
(Pb−Free)
PLCC−28
PLCC−28
(Pb−Free)
PLCC−28
PLCC−28
(Pb−Free)
Shipping
†
37 Units / Rail
37 Units / Rail
500 / Tape & Reel
500 / Tape & Reel
37 Units / Rail
37 Units / Rail
500 / Tape & Reel
500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
ECL Clock Distribution Techniques
−
Designing with PECL (ECL at +5.0 V)
−
ECLinPSt I/O SPiCE Modeling Kit
−
Metastability and the ECLinPS Family
−
Interfacing Between LVDS and ECL
−
The ECL Translator Guide
−
Odd Number Counters Design
−
Marking and Date Codes
−
Termination of ECL Logic Devices
−
Interfacing with ECLinPS
−
AC Characteristics of ECL Devices
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