IRF520S, SiHF520S
www.vishay.com
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
()
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
100
V
GS
= 10 V
16
4.4
7.7
Single
0.27
FEATURES
•
Halogen-free According to IEC 61249-2-21
Definition
• Surface Mount
Available
• Available in Tape and Reel
• Dynamic dV/dt Rating
Available
• Repetitive Avalanche Rated
• 175 °C Operating Temperature
• Fast Switching
• Ease of Paralleling
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
Note
*
This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non-RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details.
D
D
2
PAK (TO-263)
G
DESCRIPTION
G D
S
S
N-Channel MOSFET
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The D
2
PAK (TO-263) is a surface mount power package
capable of accommodating die size up to HEX-4. It provides
the highest power capability and the lowest possible
on-resistance in any existing surface mount package. The
D
2
PAK (TO-263) is suitable for high current applications
because of its low internal connection resistance and can
dissipate up to 2.0 W in a typical surface mount application.
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
D
2
PAK (TO-263)
SiHF520S-GE3
SiHF520STRR-GE3
SiHF520STRL-GE3
IRF520SPbF
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Current
a
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
LIMIT
100
± 20
9.2
6.5
37
0.40
0.025
200
9.2
6.0
60
3.7
5.5
- 55 to + 175
300
d
UNIT
V
A
Pulsed Drain
I
DM
Linear Derating Factor
Linear Derating Factor (PCB Mount)
e
Single Pulse Avalanche Energy
b
E
AS
Avalanche Currenta
I
AR
E
AR
Repetitive Avalanche Energy
a
Maximum Power Dissipation
T
C
= 25 °C
P
D
e
Maximum Power Dissipation (PCB Mount)
T
A
= 25 °C
dV/dt
Peak Diode Recovery dV/dt
c
Operating Junction and Storage Temperature Range
T
J
, T
stg
Soldering Recommendations (Peak Temperature)
For 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 25 V, starting T
J
= 25 °C, L = 3.5 mH, R
g
= 25
,
I
AS
= 9.2 A (see fig. 12).
c. I
SD
9.2 A, dI/dt
110 A/μs, V
DD
V
DS
, T
J
175 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
S16-1000-Rev. D, 23-May-16
W/°C
mJ
A
mJ
W
V/ns
°C
Document Number: 91018
1
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF520S, SiHF520S
www.vishay.com
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
(PCB Mount)
a
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJA
R
thJC
TYP.
-
-
-
MAX.
62
40
2.5
°C/W
UNIT
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
Current
a
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
V
GS
= 0, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 20 V
V
DS
= 100 V, V
GS
= 0 V
V
DS
= 80 V, V
GS
= 0 V, T
J
= 150 °C
V
GS
= 10 V
I
D
= 5.5 A
b
V
DS
= 50 V, I
D
= 5.5 A
b
100
-
2.0
-
-
-
-
2.7
-
0.13
-
-
-
-
-
-
-
-
4.0
± 100
25
250
0.27
-
V
V/°C
V
nA
μA
S
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
-
-
-
-
360
150
34
-
-
-
8.8
30
19
20
4.5
7.5
-
-
-
16
4.4
7.7
-
-
-
-
-
nH
-
ns
nC
pF
V
GS
= 10 V
I
D
= 9.2 A, V
DS
= 80 V,
see fig. 6 and 13
b
-
-
-
V
DD
= 50 V, I
D
= 9.2 A,
R
g
= 18
,
R
D
= 5.2
,
see fig. 10
b
-
-
-
Between lead,
6 mm (0.25") from
package and center of
die contact
D
-
G
-
S
-
-
-
-
-
110
0.53
9.2
A
37
1.8
260
1.3
V
ns
μC
G
S
T
J
= 25 °C, I
S
= 9.2 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 9.2 A, dI/dt = 100 A/μs
b
-
-
-
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
300 μs; duty cycle
2 %.
S16-1000-Rev. D, 23-May-16
Document Number: 91018
2
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF520S, SiHF520S
www.vishay.com
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
Vishay Siliconix
I
D
, Drain Current (A)
I
D
, Drain Current (A)
10
1
V
GS
Top
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
10
1
25
°
C
175
°
C
4.5 V
10
0
10
0
20 µs Pulse Width
V
DS
=
50 V
4
5
6
7
8
9
10
20 µs Pulse Width
T
C
=
25 °C
10
-1
91018_01
10
0
10
1
91018_03
V
DS
, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics, T
C
= 25 °C
V
GS,
Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
, Drain Current (A)
10
1
V
GS
Top
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
3.0
2.5
2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20 0
I
D
= 9.2 A
V
GS
= 10 V
4.5 V
10
0
20 µs Pulse Width
T
C
=
175 °C
10
-1
91018_02
10
0
10
1
91018_04
20 40 60 80 100 120 140 160 180
V
DS,
Drain-to-Source Voltage (V)
T
J,
Junction Temperature (°C)
Fig. 2 - Typical Output Characteristics, T
C
= 175 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
S16-1000-Rev. D, 23-May-16
Document Number: 91018
3
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF520S, SiHF520S
www.vishay.com
Vishay Siliconix
750
600
450
I
SD
, Reverse Drain Current (A)
Capacitance (pF)
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
10
1
175
°
C
C
iss
25
°
C
10
0
300
C
oss
150
C
rss
0
10
0
10
1
10
-1
0.5
91018_07
V
GS
= 0 V
0.6
0.7
0.8
0.9
1.0
1.1
1.2
91018_05
V
DS,
Drain-to-Source Voltage (V)
V
SD
, Source-to-Drain Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
20
V
GS
, Gate-to-Source Voltage (V)
I
D
= 9.2 A
V
DS
= 80 V
10
3
5
2
Operation in this area limited
by R
DS(on)
16
V
DS
= 20 V
I
D
, Drain Current (A)
V
DS
= 50 V
12
10
2
5
2
10
µs
100
µs
1
ms
10
ms
T
C
= 25
°C
T
J
= 175
°C
Single Pulse
2
5
10
5
2
8
1
5
4
For test circuit
see figure 13
2
0
0
91018_06
4
8
12
16
20
91018_08
0.1
0.1
1
2
5
10
2
5
10
2
2
5
10
3
Q
G
, Total Gate Charge (nC)
V
DS
, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
S16-1000-Rev. D, 23-May-16
Document Number: 91018
4
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF520S, SiHF520S
www.vishay.com
Vishay Siliconix
V
DS
V
GS
R
D
10
D.U.T.
+
- V
DD
R
g
I
D
, Drain Current (A)
8
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
6
Fig. 10a - Switching Time Test Circuit
4
V
DS
2
90 %
0
25
91018_09
50
75
100
125
150
175
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
T
C
, Case Temperature (°C)
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
10
Thermal Response (Z
thJC
)
1
0 - 0.5
0.2
0.1
0.05
P
DM
t
1
Single Pulse
(Thermal Response)
t
2
Notes:
1. Duty Factor, D = t
1
/t
2
2. Peak T
j
= P
DM
x Z
thJC
+ T
C
10
-2
0.1
1
10
0.1
0.02
0.01
10
-2
10
-5
91018_11
10
-4
10
-3
t
1
, Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
S16-1000-Rev. D, 23-May-16
Document Number: 91018
5
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
