NXP Semiconductors
Data sheet: Advance Information
Document Number: PF3001
Rev. 4.0, 8/2017
Power management integrated
circuit (PMIC) for i.MX 7 and i.MX 6
SoloLite/SoloX/UltraLite processors
The PF3001 is a SMARTMOS power management integrated circuit (PMIC)
designed specifically for always ON applications with the NXP i.MX 7 and i.MX
6 SoloLite/SoloX/UltraLite application processors. With up to three buck
converters, six linear regulators, RTC supply, and coin-cell charger, the PF3001
can provide power for a complete system, including applications processors,
memory, and system peripherals.
Features:
• Three adjustable high efficiency buck regulators: 2.75 A, 1.5 A, 1.25 A
• Selectable modes: PWM, PFM, APS
• Programmable output voltage, PWM switching frequency, current limit
• Six adjustable general purpose linear regulators
•
•
•
•
Input voltage range: 2.8 V to 4.5 V or 3.7 V to 5.5 V
I
2
C control
Coin cell charger and always ON RTC supply
-40 °C to +125 °C Operating Junction Temperature
PF3001
POWER MANAGEMENT
EP SUFFIX
98ASA00719D
48 QFN 7.0 X 7.0
ES SUFFIX
98ASA00933D
48 QFN 7.0 X 7.0
Applications:
• IPTV
• Set top boxes
• POS terminals
• Industrial control
• Medical monitoring
• Home automation/security/energy management
PF3001
Switching regulators
SW3
0.90 – 1.65 V, 1.5A
DDR MEMORY
i.MX
DDR MEMORY
INTERFACE
Processor
ARM Core
SW1
0.70 – 3.30 V, 2.75A
Processor SOC
SW2
1.50 – 1.85 V
or 2.5 -3.3 V, 1.25A
SD-MMC/
NAND Mem.
RESETBMCU
PWRON
SATA
HDD
SATA - FLASH
NAND - NOR
Interfaces
External AMP
Microphones
Speakers
Li CELL
Charger
SD_VSEL
INTB
I
2
C
Parallel control /
GPIOs
I
2
C
Camera
GPS
MIPI
Micro PCIe
HDMI
USB
Ethernet
CAN
Audio
Codec
Sensors
Camera
Linear regulators
VLDO1
1.8 – 3.3 V,
100mA
WAM
GPS/MIPI
LVDS
Display
VLDO2
0.8 – 1.55 V, 250mA
VCC_SD
1.8 – 1.85 V
or 2.85 – 3.3 V, 100mA
V33
2.85 -3.3 V,
350mA
100mA
350mA
VLDO3
1.8 – 3.3 V,
VLDO4
1.8 -3.3 V,
COINCELL
Main Supply
2.8 - 5.5 V
Cluster/
HUD
Front USB
POD
Rear Seat
Infotainment
Rear USB
POD
Figure 1. PF3001 simplified application diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© NXP B.V. 2017.
Table of Contents
Orderable parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Internal Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1 Pinout diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.2 Pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5 General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.2 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.3 Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6 Functional description and application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.2 Power generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.3 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.3.1 Control logic and interface signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.3.2 Start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.3.4 16 MHz and 32 kHz clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.3.5 Optional front-end input LDO regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.3.6 Internal core voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.3.7 Buck regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.3.8 LDO regulators description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.3.9 VSNVS LDO/switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.4 Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.5 Modes of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
6.5.1 State diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
6.5.2 State machine flow summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
6.5.3 Performance characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
6.6 Control interface I2C block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
6.6.1 I2C device ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
6.6.2 I2C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
6.6.3 Interrupt handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
6.6.4 Interrupt bit summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
6.6.5 Specific registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52
6.6.6 Register map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75
7 Typical applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
7.1 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
8 Bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
9 Thermal information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
9.1 Rating data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
9.2 Estimation of junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
10 Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
10.1Packaging dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
1
2
3
4
PF3001
2
NXP Semiconductors
ORDERABLE PARTS
1
Orderable parts
The PF3001 is available with pre-programmed OTP memory configurations. The devices are identified using the program codes from
Table 1.
Details of the start-up programming for each device can be found in
Table 32.
Table 1. Orderable part variations
Part number
MC32PF3001A1EP
MC32PF3001A2EP
MC32PF3001A3EP
MC32PF3001A4EP
MC32PF3001A5EP
MC32PF3001A6EP
MC32PF3001A7EP
MC33PF3001A6ES
MC33PF3001A7ES
MC34PF3001A1EP
MC34PF3001A2EP
MC34PF3001A3EP
MC34PF3001A4EP
MC34PF3001A5EP
MC34PF3001A6EP
MC34PF3001A7EP
Notes
1. For Tape and Reel add an R2 suffix to the part number.
-40 °C to 105 °C
(For use in industrial
applications)
98ASA00719D, 48 QFN 7.0 mm x
7.0 mm with exposed pad
-40 °C to 105 °C
(For use in automotive
applications)
98ASA00933D, 48 QFN 7.0 mm x
7.0 mm WF-type (wettable flank)
-40 °C to 85 °C
(For use in consumer
applications)
98ASA00719D, 48 QFN 7.0 mm x
7.0 mm with exposed pad
Temperature (T
A
)
Package
Programming options
1 (i.MX 7 with DDR3L)
2 (i.MX 7 with LPDDR3)
3 (i.MX 6SX with DDR3L)
4 (i.MX 6SX with DDR3)
5 (i.MX 6SL with LPDDR2)
6 (i.MX 6UL with LPDDR2)
7 (i.MX 6UL with DDR3L)
6 (i.MX 6UL with LPDDR2)
7 (i.MX 6UL with DDR3L)
1 (i.MX 7 with DDR3L)
2 (i.MX 7 with LPDDR3)
3 (i.MX 6SX with DDR3L)
4 (i.MX 6SX with DDR3)
5 (i.MX 6SL with LPDDR2)
6 (i.MX 6UL with LPDDR2)
7 (i.MX 6UL with DDR3L)
(1)
(1)
(1)
Notes
PF3001
NXP Semiconductors
3
GENERAL DESCRIPTION
2
General description
The PF3001 is the power management integrated circuit (PMIC) designed primarily for use with NXP’s i.MX series of multi-media
application processors. It is also capable of providing full power solutions to i.MX 6SL, 6SX, 6UL, and i.MX7processors.
2.1
Features
This section summarizes the PF3001 features.
• Input voltage range to PMIC: 2.8 V to 4.5 V, or 3.7 V to 5.5 V
(2)
• Buck regulators
• SW1, 2.75 A; 0.7 V to 1.425 V, 1.8 V, 3.3 V
• SW2, 1.25 A; 1.50 V to 1.85 V, or 2.50 V to 3.30 V
• SW3, 1.5 A; 0.90 V to 1.65 V
• Dynamic voltage scaling
• Modes: PWM, PFM, APS
• Programmable output voltage
• Programmable current limit
• Programmable PWM switching frequency
• LDOs
• VCC_SD, 1.8 V to 1.85 V, or 2.85 V to 3.30 V, 100 mA based on SD_VSEL
• V33, 2.85 V to 3.30 V, 350 mA
• VLDO1, 1.8 V to 3.3 V, 100 mA
• VLDO2, 0.80 V to 1.55 V, 250 mA
• VLDO3, 1.8 V to 3.3 V, 100 mA
• VLDO4, 1.8 V to 3.3 V, 350 mA
• Always ON RTC regulator/switch VSNVS 3.0 V, 1.0 mA
• Battery backed memory including coin cell charger
• I
2
C interface
Notes
2. 2.8 V to 4.5 V when VIN is used at input. 3.7 V to 5.5 V when VPWR is used as input.
PF3001
4
NXP Semiconductors
GENERAL DESCRIPTION
2.2
Functional block diagram
PF3001 functional internal block diagram
Fixed OTP configuration
Voltage and PWRON
configuration fixed
Power generation
Switching regulators
SW1
(0.7 V to 1.425 V,1.8 V,
3.3 V, 2.75 A)
DVS speed fixed
Phasing and
frequency fixed
Linear regulators
VCC_SD
(1.80 V to 1.85 V, 100 mA)
or (2.85 V to 3.3 V, 100 mA)
Sequence and
timing fixed
V33
Bias & references
Internal core voltage reference
SW2
(1.50 V to 1.85 V, 1.25 A)
or (2.50 V to 3.30 V, 1.25 A)
( 2.85 V to 3.30 V, 350 mA)
VLDO1
(1.8 V to 3.3 V, 100 mA)
SW3
Logic and control
Parallel MCU interface
Regulator control
(0.90 V to 1.65 V, 1.5 A)
VLDO2
(0.80 V to 1.55 V, 250 mA)
VLDO3
(1.8 V to 3.3 V, 100 mA)
I
2
C communication & registers
VLDO4
(1.8 V to 3.3 V, 350 mA)
Fault detection and protection
Thermal
Current limit
VSNVS
(1.0 V to 3.0 V, 1.0 mA)
RTC supply with coin cell
charger
VPWR front end LDO overvoltage indicator
Figure 2. PF3001 functional block diagram
PF3001
NXP Semiconductors
5
FPGA/CPLD
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