IDT74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS
OCTAL BUS TRANSCEIVER
(OPEN DRAIN)
FEATURES:
•
•
•
•
Std. and A grades
Low input and output leakage
≤
1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
• Meets or exceeds JEDEC standard 18 specifications
• Power off disable outputs permit "live insertion"
• Available in SOIC package
IDT74FCT621T/AT
DESCRIPTION:
The IDT74FCT621T is an octal transceiver with non-inverting Open-
Drain bus compatible outputs in both send and receive directions. The B
bus outputs are capable of sinking 64mA providing very good capacitive
drive characteristics. These octal bus transceivers are designed for
asynchronous two-way communication between data buses. The control
function implementation allows for maximum flexibility in timing.
FUNCTIONAL BLOCK DIAGRAM
GBA
GAB
19
1
A
1
2
18
B
1
A
2
-A
8
B
2
-B
8
SEVEN OTHER TRANSCEIVERS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
JUNE 2006
DSC-2538/10
© 2006 Integrated Device Technology, Inc.
IDT74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
T
STG
I
OUT
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
GAB
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
GBA
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
SOIC
TOP VIEW
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names
GBA,
GAB
A
1
– A
8
B
1
– B
8
Enable Inputs
A Inputs or Open-drain Outputs
B Inputs or Open-drain Outputs
Description
FUNCTION TABLE
(1)
Enable Inputs
GBA
L
H
H
L
GAB
L
H
L
H
Function
B data to A bus
A data to B bus
OFF
B data to A bus
A data to B bus
NOTE:
1. H = HIGH Voltage Level.
L = LOW Voltage Level.
OFF = HIGH if pull-up resistor is connected to Open-Drain output.
2
IDT74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
I
V
IK
I
OH
V
OL
V
OL
I
OFF
V
H
I
CC
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
Input HIGH Current
(4)
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max., V
I
= 2.7V
V
CC
= Max., V
I
= 0.5V
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 0V, V
IN
or V
O
- 4.5V
—
V
CC
= max., V
IN
= GND or Vcc
V
OH
= Vcc (Max.)
I
OL
= 64mA
(3)
I
OL
= 48mA
(3)
Min.
2
—
—
—
—
—
—
—
—
—
—
—
Typ.
(2)
—
—
—
—
—
–0.7
—
0.3
0.3
—
200
0.01
Max.
—
0.8
±1
±1
±1
–1.2
20
0.55
0.5
±1
—
1
Unit
V
V
µA
µA
µA
V
µA
V
V
µA
mV
mA
Clamp Diode Voltage
Output HIGH Current
Output LOW Voltage
(B Bus)
Output LOW Voltage
(A Bus)
Input/Output Power Off
Leakage
(4)
Input Hysteresis
Quiescent Power Supply
Current
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. These are maximum I
OL
values per output, for 8 outputs turned on simultaneously. Total maximum I
OL
(all outputs) is 512mA for commercial and 384mA for military. Derate
I
OL
for number of outputs exceeding 8 turned on simultaneously.
4. The test limit for this parameter is ±5µA at T
A
= –55°C.
3
IDT74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
ΔI
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
V
CC
= Max.
V
IN
= 3.4V
(3)
Vcc = Max.
Outputs Open
GBA
= GAB = GND or V
CC
One Input Toggling
50% Duty Cycle
Vcc = Max.
Outputs Open
GBA
= GAB = GND or V
CC
One Bit Toggling
at f
i
=10MHz
50% Duty Cycle
Vcc = Max.
Outputs Open
GBA
= GAB = GND or V
CC
Eight Bits Toggling
at f
i
= 2.5MHz
50% Duty Cycle
V
IN
= V
CC
V
IN
= GND
Test Conditions
(1)
Min.
—
—
Typ.
(2)
0.5
0.15
Max.
2
0.25
Unit
mA
mA/MHz
I
C
Total Power Supply Current
(6,7)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
1.5
3.5
mA
—
1.8
4.5
—
3
6
(5)
14
(5)
—
5
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
ΔI
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
ΔI
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
7. This test is performed with outputs tied to GND through a pull-down resistor.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT74FCT621T
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
IDT74FCT621AT
Max.
13
8.5
12.5
8
14
8.5
14
8
Min.
(2)
5.5
1.5
5.5
1.5
5.5
1.5
5.5
1.5
Max.
12
6.8
12
6.4
13
6.8
13
6.4
ns
ns
ns
Parameter
Propagation Delay, A to B
Propagation Delay, B to A
Propagation Delay,
GBA
to A
Propagation Delay,
GAB
to B
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
Min.
(2)
5.5
1.5
5.5
1.5
5.5
1.5
5.5
1.5
Unit
ns
4
IDT74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V
CC
500W
V
IN
Pulse
Generator
R
T
D.U.T
.
V
OUT
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Switch
Closed
Open
50pF
C
L
500W
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
Octal Link
Test Circuits for All Outputs
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
SU
t
H
t
REM
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
1.5V
1.5V
t
SU
t
H
Pulse Width
Octal Link
Octal Link
Set-Up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
CONTROL
INPUT
t
PZL
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
1.5V
0V
3.5V
1.5V
t
PHZ
DISABLE
3V
1.5V
0V
3.5V
0.3V
0.3V
V
OL
V
OH
0V
Octal Link
t
PLZ
Octal Link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns.
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
