IDT74FCT645T/AT/CT/DT
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS OCTAL
BIDIRECTIONAL
TRANSCEIVER
FEATURES:
−
−
−
−
−
−
−
Low input and output leakage
≤1µ
A (max.)
CMOS power levels
True TTL input and output compatibility
•
V
OH
= 3.3V (typ.)
•
V
OL
= 0.3V (typ.)
Meets or exceeds JEDEC standard 18 specifications
Available in SOIC, and SSOP packages
Std., A, C and D speed grades
High drive outputs (-15mA I
OH
, 64mA I
OL
)
IDT74FCT645T/AT/CT/DT
DESCRIPTION:
The IDT octal bidirectional transceivers are built using an advanced dual
metal CMOS technology. The FCT645T is designed for asynchronous two-
way communication between data buses. The transmit/receive (T/R) input
determines the direction of data flow through the bidirectional transceiver.
Transmit (active high) enables data from A ports to B ports, and receive
(active low) from B ports to A ports. The output enable (OE) input, when
high, disables both A and B ports by placing them in high Z condition.
FUNCTIONAL BLOCK DIAGRAM
T/
R
OE
A
0
B
0
A
1
B
1
A
2
B
2
A
3
B
3
A
4
B
4
A
5
B
5
A
6
B
6
A
7
B
7
INDUSTRIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
AUGUST 2000
DSC-5512/-
IDT74FCT645T/AT/CT/DT
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
Rating
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max.
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
8T-link
T/R
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
GND
1
2
3
4
5
6
7
8
9
10
SO20-2
SO20-7
20
19
18
17
16
15
14
13
12
11
V
CC
OE
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
V
TERM(3)
T
STG
I
OUT
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
No
terminal voltage may exceed Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Outputs and I/O terminals only.
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
8T-link
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
SOIC/ SSOP
TOP VIEW
Pin Names
OE
T/R
A
0
-A
7
B
0
-B
7
Description
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs or 3-State Outputs
Side B Inputs or 3-State Outputs
FUNCTION TABLE
Inputs
OE
L
L
H
T/R
L
H
X
(1)
Outputs
Bus B Data to Bus A
Bus A Data to Bus B
High Z State
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
2
IDT74FCT645T/AT/CT/DT
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= -40°C to +85°C, V
CC
= 5.0V ± 5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
I
V
IK
V
H
I
CC
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
High Impedance Output Current
(3-State output pins)
(4)
Input HIGH Current
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min., I
IN
= –18mA
—
V
CC
= Max., V
IN
=
GND or
V
CC
V
CC
= Max.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= 2.7V
V
I
= 0.5V
V
O
= 2.7V
V
O
= 0.5V
Min.
2
—
—
—
—
—
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
–0.7
200
0.01
Max.
—
0.8
±1
±1
±1
±1
±1
–1.2
—
1
µA
V
mV
µA
µA
Unit
V
V
µA
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
V
OL
I
OS
Parameter
Output HIGH Voltage
Output LOW Voltage
Short Circuit Current
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= Max, V
O
= GND
(3)
Test Conditions
(1)
I
OH
= –8mA
I
OH
= –15mA
I
OL
= 64mA
Min.
2.4
2
—
–60
Typ.
(2)
3.3
3
0.3
–120
Max.
—
—
0.55
–225
V
mA
Unit
V
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for thie parameter is ±5µA at T
A
= -55°C.
3
IDT74FCT645T/AT/CT/DT
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
= T/R = GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fi = 10MHz
50% Duty Cycle
OE
= T/R = GND
One Bit Toggling
V
CC
= Max.
Outputs Open
fi = 2.5MHz
50% Duty Cycle
OE
= T/R = GND
Eight Bits Toggling
Min.
—
—
Typ.
(2)
0.5
0.15
Max.
2
0.25
Unit
mA
mA/
MHz
V
IN
= V
CC
V
IN
= GND
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4
V
IN
= GND
—
1.5
3.5
mA
—
1.8
4.5
—
3
6
(5)
—
5
14
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP/
2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
SWITCHING CHARACTRISTICS OVER OPERATING RANGE
FCT645T
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
Parameter
Propagation Delay
A to B, B to A
Output Enable Time
OE
to A or B
Output Disable Time
OE
to A or B
Output Enable Time
T/R to A or B
(3)
Output Disable Time
T/R to A or B
(3)
Conditions
(1)
C
L
= 50 pF
R
L
= 500Ω
Min.
(2)
1.5
1.5
1.5
1.5
1.5
Max.
9.5
11
12
11
12
FCT645AT
Min.
(2)
1.5
1.5
1.5
1.5
1.5
Max.
4.6
6.2
5
6.2
5
FCT645CT
Min
.
(2)
1.5
1.5
1.5
1.5
1.5
Max.
4.1
5.8
4.8
5.8
4.8
FCT645DT
Min.
(2)
1.5
1.5
1.5
1.5
1.5
Max.
3.8
5
4.3
5
4.3
Unit
ns
ns
ns
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
4
IDT74FCT645T/AT/CT/DT
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
500
Ω
V
IN
Pulse
Generator
D.U.T.
50pF
R
T
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Open
8-link
7.0V
Switch
Closed
V
OUT
500
Ω
C
L
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
O ctal lin k
SET-UP, HOLD, AND RELEASE TIMES
DATA
INPUT
t
SU
TIM ING
INPUT
ASYNCHRONOUS C ONTROL
PRES ET
CLEAR
ETC.
SYNCHRO NOUS CONTRO L
PRES ET
CLEAR
CLOCK ENABLE
ETC.
t
REM
t
H
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
O ctal lin k
PULSE WIDTH
LO W -HIGH-LOW
PULSE
t
W
HIGH-LOW -HIGH
PULSE
O ctal lin k
1.5V
1.5V
t
SU
t
H
PROPAGATION DELAY
SAM E PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE P HASE
INPUT TRANSITION
t
PH L
t
PH L
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
O ctal lin k
ENABLE AND DISABLE TIMES
ENAB LE
DISA BLE
3V
CO NTROL
INPUT
t
PZL
OUTPUT
NO RM A LLY
LO W
SW ITCH
CLOSE D
t
PZH
OUTPUT
NO RM A LLY
HIGH
SW ITCH
OPEN
3.5V
1.5V
0.3V
t
PHZ
0.3V
1.5V
0V
0V
O ctal lin k
1.5V
t
PLZ
0V
3.5V
V
OL
V
OH
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
5
stm32/stm8
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