T1 / E1 / J1 Octal Framer
IDT82V2108
Version 5
November 26, 2012
2975 Stender Way, Santa Clara, Califormia 95054
Telephone: (800) 345-7015 • TWX: 910-338-2070 • FAX: (408) 492-8674
Printed in U.S.A.
© 2011 Integrated Device Technology, Inc.
DISCLAIMER
Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best pos-
sible product. IDT does not assume any responsibility for use of any circuitry described other than the circuitry embodied in an IDT product. The Company makes no representations that circuitry
described herein is free from patent infringement or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent, patent rights or other
rights, of Integrated Device Technology, Inc.
LIFE SUPPORT POLICY
Integrated Device Technology's products are not authorized for use as critical components in life support devices or systems unless a specific written agreement pertaining to such intended use is exe-
cuted between the manufacturer and an officer of IDT.
1. Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform, when properly used in
accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.
2. A critical component is any components of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its
safety or effectiveness.
Table of Contents
FEATURES ........................................................................................................................................................................ 1
• APPLICATIONS ................................................................................................................................................................ 1
• STANDARDS .................................................................................................................................................................... 1
• DESCRIPTION .................................................................................................................................................................. 2
• FUNCTIONAL BLOCK DIAGRAM .................................................................................................................................... 3
1 PIN ASSIGNMENT ............................................................................................................................................................ 4
2 PIN DESCRIPTION ........................................................................................................................................................... 6
3 FUNCTIONAL DESCRIPTION ........................................................................................................................................ 12
T1 / E1 / J1 MODE SELECTION ..................................................................................................................................................................
FRAME PROCESSOR (FRMP) ....................................................................................................................................................................
3.2.1 E1 Mode ..........................................................................................................................................................................................
3.2.1.1 Synchronization Searching ...............................................................................................................................................
3.2.1.1.1 Basic Frame ..................................................................................................................................................
3.2.1.1.2 CRC Multi-Frame ...........................................................................................................................................
3.2.1.1.3 CAS Signaling Multi-Frame ...........................................................................................................................
3.2.1.2 Alarms & Bit Extraction .....................................................................................................................................................
3.2.1.2.1 RED Alarm .....................................................................................................................................................
3.2.1.2.2 AIS Alarm ......................................................................................................................................................
3.2.1.2.3 Bit Extraction .................................................................................................................................................
3.2.1.2.4 V5.2 Link ........................................................................................................................................................
3.2.1.3 Interrupt Sources ..............................................................................................................................................................
3.2.2 T1/J1 Mode ......................................................................................................................................................................................
3.2.2.1 Synchronization Searching ...............................................................................................................................................
3.2.2.1.1 Super Frame (SF) Format .............................................................................................................................
3.2.2.1.2 Extended Super Frame (ESF) Format ...........................................................................................................
3.2.2.2 Out Of Synchronization Detection & Interrupt ..................................................................................................................
3.3 PERFORMANCE MONITOR (PMON) ..........................................................................................................................................................
3.3.1 E1 Mode ..........................................................................................................................................................................................
3.3.2 T1/J1 Mode ......................................................................................................................................................................................
3.4 ALARM DETECTOR (ALMD) - T1/J1 ONLY ...............................................................................................................................................
3.5 HDLC RECEIVER (RHDLC) .........................................................................................................................................................................
3.5.1 E1 Mode ..........................................................................................................................................................................................
3.5.2 T1/J1 Mode ......................................................................................................................................................................................
3.6 BIT-ORIENTED MESSAGE RECEIVER (RBOM) - T1/J1 ONLY ................................................................................................................
3.7 INBAND LOOPBACK CODE DETECTOR (IBCD) - T1/J1 ONLY ...............................................................................................................
3.8 ELASTIC STORE BUFFER (ELSB) .............................................................................................................................................................
3.8.1 E1 Mode ..........................................................................................................................................................................................
3.8.2 T1/J1 Mode ......................................................................................................................................................................................
3.9 RECEIVE CAS/RBS BUFFER (RCRB) ........................................................................................................................................................
3.9.1 E1 Mode ..........................................................................................................................................................................................
3.9.2 T1/J1 Mode ......................................................................................................................................................................................
3.10 RECEIVE PAYLOAD CONTROL (RPLC) ....................................................................................................................................................
3.1
3.2
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1.1
1.2
128 PIN PQFP PACKAGE (TOP VIEW) ........................................................................................................................................................ 4
144 PIN PBGA PACKAGE (BOTTOM VIEW) ............................................................................................................................................... 5
•
•
E1 MODE: ....................................................................................................................................................................................................... 1
T1/J1 MODE: .................................................................................................................................................................................................. 1
Table of Contents
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IDT82V2108
T1 / E1 / J1 OCTAL FRAMER
3.11
3.12
3.13
3.14
3.15
3.10.1 E1 Mode ..........................................................................................................................................................................................
3.10.2 T1/J1 Mode ......................................................................................................................................................................................
RECEIVE SYSTEM INTERFACE (RESI) .....................................................................................................................................................
3.11.1 E1 Mode ..........................................................................................................................................................................................
3.11.1.1 Receive Clock Slave Mode ..............................................................................................................................................
3.11.1.1.1 Receive Clock Slave RSCK Reference Mode ...............................................................................................
3.11.1.1.2 Receive Clock Slave External Signaling Mode ..............................................................................................
3.11.1.2 Receive Clock Master Mode ............................................................................................................................................
3.11.1.2.1 Receive Clock Master Full E1 Mode .............................................................................................................
3.11.1.2.2 Receive Clock Master Fractional E1 (with F-bit) Mode .................................................................................
3.11.1.3 Receive Multiplexed Mode ...............................................................................................................................................
3.11.1.4 Parity Check & Polarity Fix ...............................................................................................................................................
3.11.1.5 Offset ................................................................................................................................................................................
3.11.1.6 Output On RSDn/MRSD & RSSIGn/MRSSIG ..................................................................................................................
3.11.2 T1/J1 Mode ......................................................................................................................................................................................
3.11.2.1 Receive Clock Slave Mode ..............................................................................................................................................
3.11.2.1.1 Receive Clock Slave RSCK Reference Mode ...............................................................................................
3.11.2.1.2 Receive Clock Slave External Signaling Mode ..............................................................................................
3.11.2.2 Receive Clock Master Mode ............................................................................................................................................
3.11.2.2.1 Receive Clock Master Full T1/J1 Mode .........................................................................................................
3.11.2.2.2 Receive Clock Master Fractional T1/J1 Mode ...............................................................................................
3.11.2.3 Receive Multiplexed Mode ...............................................................................................................................................
3.11.2.4 Parity Check .....................................................................................................................................................................
3.11.2.5 Offset ................................................................................................................................................................................
3.11.2.6 Output On RSDn/MRSD & RSSIGn/MRSSIG ..................................................................................................................
PRBS GENERATOR / DETECTOR (PRGD) ...............................................................................................................................................
3.12.1 E1 Mode ..........................................................................................................................................................................................
3.12.1.1 Pattern Generator .............................................................................................................................................................
3.12.1.2 Pattern Detector ...............................................................................................................................................................
3.12.2 T1/J1 Mode ......................................................................................................................................................................................
3.12.2.1 Pattern Generator .............................................................................................................................................................
3.12.2.2 Pattern Detector ...............................................................................................................................................................
TRANSMIT SYSTEM INTERFACE (TRSI) ..................................................................................................................................................
3.13.1 E1 Mode ..........................................................................................................................................................................................
3.13.1.1 Transmit Clock Slave Mode .............................................................................................................................................
3.13.1.1.1 Transmit Clock Slave TSFS Enable Mode ....................................................................................................
3.13.1.1.2 Transmit Clock Slave External Signaling Mode .............................................................................................
3.13.1.2 Transmit Clock Master Mode ............................................................................................................................................
3.13.1.3 Transmit Multiplexed Mode ..............................................................................................................................................
3.13.1.4 Parity Check .....................................................................................................................................................................
3.13.1.5 Offset ................................................................................................................................................................................
3.13.2 T1/J1 Mode ......................................................................................................................................................................................
3.13.2.1 Transmit Clock Slave Mode .............................................................................................................................................
3.13.2.1.1 Transmit Clock Slave TSFS Enable Mode ....................................................................................................
3.13.2.1.2 Transmit Clock Slave External Signaling Mode .............................................................................................
3.13.2.2 Transmit Clock Master Mode ............................................................................................................................................
3.13.2.3 Transmit Multiplexed Mode ..............................................................................................................................................
3.13.2.4 Parity Check .....................................................................................................................................................................
3.13.2.5 Offset ................................................................................................................................................................................
TRANSMIT PAYLOAD CONTROL (TPLC) .................................................................................................................................................
3.14.1 E1 Mode ..........................................................................................................................................................................................
3.14.2 T1/J1 Mode ......................................................................................................................................................................................
FRAME GENERATOR (FRMG) ...................................................................................................................................................................
3.15.1 E1 Mode ..........................................................................................................................................................................................
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Table of Contents
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IDT82V2108
T1 / E1 / J1 OCTAL FRAMER
3.16
3.17
3.18
3.19
3.20
3.21
3.22
3.23
3.24
4.1
3.15.1.1 Generation ........................................................................................................................................................................
3.15.1.2 Alarm Indication ................................................................................................................................................................
3.15.1.3 Control Over International / National / Extra Bits ..............................................................................................................
3.15.1.4 Diagnostics .......................................................................................................................................................................
3.15.1.5 Interrupt Summary ............................................................................................................................................................
3.15.2 T1/J1 Mode ......................................................................................................................................................................................
HDLC TRANSMITTER (THDLC) ..................................................................................................................................................................
3.16.1 E1 Mode ..........................................................................................................................................................................................
3.16.2 T1/J1 Mode ......................................................................................................................................................................................
BIT-ORIENTED MESSAGE TRANSMITTER (TBOM) - T1/J1 ONLY .........................................................................................................
INBAND LOOPBACK CODE GENERATOR (IBCG) - T1/J1 ONLY ...........................................................................................................
JITTER ATTENUATOR (RJAT/TJAT) .........................................................................................................................................................
3.19.1 E1 Mode ..........................................................................................................................................................................................
3.19.1.1 Jitter Characteristics .........................................................................................................................................................
3.19.1.2 Jitter Tolerance .................................................................................................................................................................
3.19.1.3 Jitter Transfer ...................................................................................................................................................................
3.19.1.4 Frequency Range .............................................................................................................................................................
3.19.2 T1/J1 Mode ......................................................................................................................................................................................
3.19.2.1 Jitter Characteristics .........................................................................................................................................................
3.19.2.2 Jitter Tolerance .................................................................................................................................................................
3.19.2.3 Jitter Transfer ...................................................................................................................................................................
3.19.2.4 Frequency Range .............................................................................................................................................................
TRANSMIT CLOCK ......................................................................................................................................................................................
3.20.1 E1 Mode ..........................................................................................................................................................................................
3.20.2 T1/J1 Mode ......................................................................................................................................................................................
LINE INTERFACE ........................................................................................................................................................................................
3.21.1 E1 Mode ..........................................................................................................................................................................................
3.21.2 T1/J1 Mode ......................................................................................................................................................................................
INTERRUPT SUMMARY ..............................................................................................................................................................................
3.22.1 E1 Mode ..........................................................................................................................................................................................
3.22.2 T1/J1 Mode ......................................................................................................................................................................................
LOOPBACK MODE ......................................................................................................................................................................................
3.23.1 Line Loopback ................................................................................................................................................................................
3.23.2 Digital Loopback ............................................................................................................................................................................
3.23.3 Payload Loopback .........................................................................................................................................................................
CLOCK MONITOR .......................................................................................................................................................................................
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4 OPERATION .................................................................................................................................................................... 94
E1 MODE ...................................................................................................................................................................................................... 94
4.1.1 Default Setting ................................................................................................................................................................................ 94
4.1.2 Various Operation Modes Configuration ..................................................................................................................................... 95
4.1.3 Operation Example ........................................................................................................................................................................ 98
4.1.3.1 Using HDLC Receiver ...................................................................................................................................................... 98
4.1.3.2 Using HDLC Transmitter ................................................................................................................................................ 100
4.1.3.3 Using PRBS Generator / Detector .................................................................................................................................. 103
4.1.3.4 Using Payload Control and Receive CAS/RBS Buffer ................................................................................................... 107
4.1.3.5 Using TJAT / Timing Option ........................................................................................................................................... 107
T1/J1 MODE ............................................................................................................................................................................................... 108
4.2.1 Default Setting .............................................................................................................................................................................. 108
4.2.2 Operation In J1 Mode ................................................................................................................................................................... 109
4.2.3 Various Operation Modes Configuration ................................................................................................................................... 109
4.2.4 Operation Example ...................................................................................................................................................................... 114
4.2.4.1 Using HDLC Receiver .................................................................................................................................................... 114
4.2.4.2 Using HDLC Transmitter ................................................................................................................................................ 116
4.2
Table of Contents
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November 26, 2012
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