Operating Temperature Range ..........................-40ºC to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65ºC to +150°C
Lead Temperature (soldering, 10s) ................................. +300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Note 1:
An external pFET or diode is required to achieve negative input protection.
Note 2:
DC current-limited by R
SETI
, as well as by thermal design.
Package Information
PACKAGE TYPE: 20 TQFN
Package Code
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
JA
)
Junction to Case (θ
JC
)
29°C/W
2°C/W
T2055+5C
21-0140
90-0010
For the latest package outline information and land patterns (footprints), go to
www.maximintegrated.com/packages.
Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
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Maxim Integrated
│
2
MAX17525
High-Accuracy, Adjustable Power Limiter
Electrical Characteristics
(V
IN
= 5.5V to 60V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
IN
= 12V, T
A
= +25°C) (Note 3)
PARAMETER
POWER SUPPLY
IN Voltage Range
Shutdown IN Current
Supply Current
Shutdown OUT Current
UVLO, OVLO
Internal UVLO Trip Level
UVLO Hysteresis
Internal OVLO Trip Level
OVLO Hysteresis
External UVLO Adjustment Range
(Note 4)
External UVLO Select Voltage
External UVLO Leakage Current
External OVLO Adjustment Range
(Note 4)
External OVLO Select Voltage
External OVLO Leakage Current
External UVLO/OVLO Set Voltage
Undervoltage Trip Level on OUT
GP
Gate Clamp Voltage
Gate Active Pullup
Gate Active Pulldown
Shutdown Gate Active Pullup
INTERNAL FETs
Internal FETs On-Resistance
Current Limit Adjustment Range
Current Limit Accuracy
V
EN
= 5V
V
EN
= 0V, V
HVEN
= 5V
I
LOAD
= 100mA, VIN
≥ 10V,
TA = +25ºC
0.6
1A ≤ I
LIM
≤ 6A (T
A
= +25°C)
0.6A ≤ I
LIM
≤ 6A
-10
-15
47
SYMBOL
V
IN
I
SHDN
I
IN
I
OFF
V
UVLO
CONDITIONS
MIN
5.5
TYP
MAX
60
UNITS
V
µA
mA
µA
V
EN
= 0V, V
HVEN
= 5V, VIN < 40V
V
EN
= 0V, V
HVEN
= 5V
V
IN
= V
OUT
= 24V, V
HVEN
= 0V
V
EN
= 0V, V
HVEN
= 5V
V
IN
falling, UVLO trip point
V
IN
rising
% of typical UVLO
V
IN
falling
V
IN
rising, OVLO trip point
% of typical OVLO
5.5
11.5
11.9
32.2
34.7
4
4
1.4
50
12
12.4
3
34.1
36.2
6
15
150
2.16
100
12.5
13.1
35.8
37.6
24
V
%
V
%
V
V
nA
V
V
nA
V
V
V
OVLO
V
UVLO_SEL
I
UVLO_LEAK
0.15
-250
6
0.38
0.5
+250
40
V
OVLO_SEL
I
OVLO_LEAK
VSET
V
OUT
falling, UVLO trip point
V
OUT
rising
0.15
-250
1.18
11.5
11.9
10
0.38
0.5
+250
1.22
12
12.4
16.1
11
110
2.4
1.27
12.5
13
20
22
V
UVLO_OUT
V
GP
V
Ω
µA
MΩ
R
ON
I
LIM
I
LIM_ACC
31
44
6
+10
+15
mΩ
A
%
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Maxim Integrated
│
3
MAX17525
High-Accuracy, Adjustable Power Limiter
Electrical Characteristics (continued)
(V
IN
= 5.5V to 60V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
IN
= 12V, T
A
= +25°C) (Note 3)
PARAMETER
FLAG
Assertion Drop Voltage
Threshold
Slow Reverse Current-Blocking
Threshold
Slow Reverse Current-Blocking
Response Time
Fast Reverse Current-Blocking
Threshold
Fast Reverse Current-Blocking
Response Time
SYMBOL
V
FA
V
RIB_SLOW
t
RIB_SLOW
V
RIB_FAST
CONDITIONS
Increase in (V
IN
- V
OUT
) drop until
FLAG
asserts, V
IN
= 24V
V
IN
- V
OUT
See the
Slow Reverse-Current Fault
Timing Diagram
V
IN
- V
OUT
(V
IN
- V
OUT
) changes from 0.2V to -0.3V
in 100nsec, t
RIB
is the interval between
V
IN
- V
OUT
= V
RIB_FAST
and V
IN-GP
=
0.5V with C
IN-GP
= 5nF
V
OUT
= 24V
MIN
TYP
490
MAX
UNITS
mV
-0.5
-5.4
17
-10.5
30
mV
µs
-85
-100
-115
mV
t
RIB_FAST
0.7
1
µs
Reverse-Blocking Supply Current
I
RBS
3280
5110
µA
LOGIC INPUT (HVEN,
CLTS1, CLTS2, EN, RIPEN)
HVEN
Threshold Voltage
HVEN
Threshold Hysteresis
HVEN
Input Leakage Current
EN, RIPEN, CLTS1, CLTS2 Input
Logic-High
EN, RIPEN, CLTS1, CLTS2 Input
Logic-Low
EN Input Leakage Current
CLTS_ Leakage Current
RIPEN Leakage Current
LOGIC OUTPUT (FLAG)
Logic-Low Voltage
Input Leakage Current
SETI
RSETI x ILIM
Current Mirror Output Ratio
I
SINK
= 1mA
V
IN
= 5.5V,
FLAG
deasserted
See the
Setting the Current-Limit
Threshold
section
See the
Setting the Current-Limit
Threshold
section
0.4
1
V
µA
V
HVEN
_TH
I
HVEN_LEAK
V
IH
V
IL
I
EN_LEAK
V
EN
= 0V, 5V
CLTS_ = GND
V
HVEN
= 60V
1
2
5
51
3.1
72
V
%
µA
V
1.4
0.4
-1
25
25
+1
V
µA
µA
µA
I
RIBEN_LEAK
RIPEN = GND
V
RI
C
IRATIO
1.5
25000
V
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Maxim Integrated
│
4
MAX17525
High-Accuracy, Adjustable Power Limiter
Electrical Characteristics (continued)
(V
IN
= 5.5V to 60V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
IN
= 12V, T
A
= +25°C) (Note 3)
PARAMETER
DYNAMIC PERFORMANCE (NOTE 5)
Switch Turn-On Time
Fault Recovery nFET Turn-On
Time
Fault Recovery pFET Turn-on
Time
Reverse-Current Fault Recovery
Time
OVP Switch Response Time
Overcurrent Switch Response time
Startup Timeout
Startup Initial Time
IN Debounce Time
Blanking Time
Autoretry Time
THERMAL PROTECTION
Thermal Foldback
Thermal Shutdown
Thermal-Shutdown Hysteresis
SYMBOL
CONDITIONS
V
IN
= 24V, switch OFF to ON, R
LOAD
=
240Ω, I
LIM
= 1A, C
OUT
= 4.7µF, V
OUT
from 20% to 80% of V
IN
Turn-on delay after fault timers expired
V
OUT
> V
UVLO_OUT
, turn-on delay of
pFET after fault timers expired
MIN
TYP
MAX
UNITS
t
ON
t
ON_NFET
t
ON_PFET
t
REV_REC
t
OVP_RES
t
OCP_RES
t
STO
t
STI
t
DEB
t
BLANK
t
RETRY
T
J_FB
T
J_MAX
68
µs
200
1.08
0.4
1.2
0.45
3
500
1.32
0.5
µs
ms
ms
µs
µs
I
LIM
= 4A
Initial start current-limit foldback timeout
(Figure 1)
Current is continuously limited to
1x/1.5x/2x in this interval (Figure 1)
Additional turn-on delay if V
OUT
<
V
UVLO_OUT
, see the
Timing Diagrams
(Figures 3 and 4)
(Figure 3, Note 6)
1090
21.8
1.09
21.8
554
3
1200
24
1.2
24
720
150
170
20
1320
26.4
1.32
26.4
792
ms
ms
ms
ms
ms
°C
°C
°C
Note 3:
All devices are 100% production-tested at T
A
= +25°C. Specifications over the operating temperature range are guaranteed
by design.
Note 4:
Not production-tested, user-adjustable. See the
Overvoltage Lockout (OVLO)
and
Undervoltage Lockout (UVLO)
sections.
Note 5:
All timing is measured using 20% and 80% levels, unless otherwise specified.
Note 6:
The autoretry time-to-blanking time ratio is fixed and is equal to 30.
SMT贴片机是表面贴装技术(Surface Mount Technology)中的重要设备,它的性能状态对电子制造的质量和效率有着决定性的影响。因此,对SMT贴片机的主要指标性能进行定期检测非常重要。以下是一些主要的检测项目: 定位精度:定位精度是SMT贴片机的核心性能指标,它直接影响到贴片的准确性。通常,我们通过重复测量贴片机在X、Y轴上的移动误差来检测其定位精度。 贴片速度:贴片速度...[详细]