CPLD MAX® II Family 192 Macro Cells 201.1MHz 0.18um Technology 2.5V/3.3V 100-Pin MBGA Tray
参数名称 | 属性值 |
欧盟限制某些有害物质的使用 | Compliant |
ECCN (US) | EAR99 |
Part Status | Active |
HTS | 8542.39.00.01 |
Family Name | MAX® II |
Logic Elements | 240 |
Program Memory Type | Flash |
Memory Size (Kbit) | 8 |
Number of Logic Blocks/Elements | 24 |
Number of Global Clocks | 4 |
Number of I/O Banks | 2 |
Number of Macro Cells | 192 |
Process Technology | 0.18um |
Data Gate | No |
Maximum Number of User I/Os | 80 |
In-System Programmability | Yes |
Number of Inter Dielectric Layers | 6 |
Programmability | Yes |
Reprogrammability Support | No |
Maximum Internal Frequency (MHz) | 1879.7 |
Maximum Clock to Output Delay (ns) | 6.9 |
Maximum Propagation Delay Time (ns) | 7.5 |
Speed Grade | 5 |
Individual Output Enable Control | Yes |
Minimum Operating Supply Voltage (V) | 2.375 |
Maximum Operating Supply Voltage (V) | 3.6 |
Typical Operating Supply Voltage (V) | 2.5|3.3 |
I/O Voltage (V) | 1.5|1.8|2.5|3.3 |
Tolerant Configuration Interface Voltage (V) | 1.8|2.5|3.3|5 |
Minimum Operating Temperature (°C) | 0 |
Maximum Operating Temperature (°C) | 85 |
Supplier Temperature Grade | Commercial |
系列 Packaging | Tray |
Supplier Package | MBGA |
Pin Count | 100 |
Standard Package Name | BGA |
Mounting | Surface Mount |
Package Height | 0.85 |
Package Length | 6 |
Package Width | 6 |
PCB changed | 100 |
Lead Shape | Ball |
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