IMPORTANT NOTICE
10 December 2015
1. Global joint venture starts operations as WeEn Semiconductors
Dear customer,
As from November 9th, 2015 NXP Semiconductors N.V. and Beijing JianGuang Asset
Management Co. Ltd established Bipolar Power joint venture (JV),
WeEn Semiconductors,
which
will be used in future Bipolar Power documents together with new contact details.
In this document where the previous NXP references remain, please use the new links as shown
below.
WWW
- For www.nxp.com use
www.ween-semi.com
Email
- For salesaddresses@nxp.com use
salesaddresses@ween-semi.com
For the copyright notice at the bottom of each page (or elsewhere in the document, depending
on the version) “
©
NXP Semiconductors N.V.
{year}.
All rights reserved”
becomes “
©
WeEn
Semiconductors Co., Ltd.
{year}.
All rights reserved”
If you have any questions related to this document, please contact our nearest sales office via e-
mail or phone (details via
salesaddresses@ween-semi.com).
Thank you for your cooperation and understanding,
WeEn Semiconductors
DISCRETE SEMICONDUCTORS
DATA SHEET
BTA212B series D, E and F
Three quadrant triacs
guaranteed commutation
Product
specification
October 2003
1;3
Semiconductors
Product specification
Three quadrant triacs
guaranteed commutation
GENERAL DESCRIPTION
Passivated guaranteed commutation
triacs in a plastic envelope suitable for
surface mounting intended for use in
motor control circuits or with other highly
inductive loads. These devices balance
the requirements of commutation
performance and gate sensitivity. The
"sensitive gate" E series and "logic level"
D series are intended for interfacing with
low power drivers, including micro
controllers.
BTA212B series D, E and F
QUICK REFERENCE DATA
SYMBOL
PARAMETER
BTA212B-
BTA212B-
BTA212B-
Repetitive peak off-state
voltages
RMS on-state current
Non-repetitive peak on-state
current
MAX. MAX UNIT
600D
600E 800E
600F
600
800
12
95
12
95
V
DRM
I
T(RMS)
I
TSM
V
A
A
PINNING - SOT404
PIN
1
2
3
mb
DESCRIPTION
main terminal 1
main terminal 2
gate
main terminal 2
PIN CONFIGURATION
mb
SYMBOL
T2
2
1
3
T1
G
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL
V
DRM
I
T(RMS)
I
TSM
PARAMETER
Repetitive peak off-state
voltages
RMS on-state current
Non-repetitive peak
on-state current
full sine wave;
T
mb
≤
99 ˚C
full sine wave;
T
j
= 25 ˚C prior to
surge
t = 20 ms
t = 16.7 ms
t = 10 ms
I
TM
= 20 A; I
G
= 0.2 A;
dI
G
/dt = 0.2 A/μs
CONDITIONS
MIN.
-
-
-600
600
1
12
MAX.
-800
800
UNIT
V
A
I
2
t
dI
T
/dt
I
GM
P
GM
P
G(AV)
T
stg
T
j
I
2
t for fusing
Repetitive rate of rise of
on-state current after
triggering
Peak gate current
Peak gate power
Average gate power
Storage temperature
Operating junction
temperature
-
-
-
95
105
45
100
2
5
0.5
150
125
A
A
A
2
s
A/μs
A
W
W
˚C
˚C
over any 20 ms
period
-
-
-
-40
-
1
Although not recommended, off-state voltages up to 800V may be applied without damage, but the triac may
switch to the on-state. The rate of rise of current should not exceed 15 A/μs.
October 2003
1
Rev 3.000
1;3
Semiconductors
Product specification
Three quadrant triacs
guaranteed commutation
THERMAL RESISTANCES
SYMBOL
R
th j-mb
R
th j-a
PARAMETER
CONDITIONS
BTA212B series D, E and F
MIN.
-
-
-
TYP.
-
-
55
MAX.
1.5
2.0
-
UNIT
K/W
K/W
K/W
Thermal resistance
full cycle
junction to mounting base half cycle
Thermal resistance
in free air
junction to ambient
STATIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL
I
GT
PARAMETER
Gate trigger current
2
CONDITIONS
BTA212B-
V
D
= 12 V; I
T
= 0.1 A
T2+ G+
T2+ G-
T2- G-
V
D
= 12 V; I
GT
= 0.1 A
T2+ G+
T2+ G-
T2- G-
V
D
= 12 V; I
GT
= 0.1 A
I
T
= 17 A
V
D
= 12 V; I
T
= 0.1 A
V
D
= 400 V; I
T
= 0.1 A;
T
j
= 125 ˚C
V
D
= V
DRM(max)
; T
j
= 125 ˚C
MIN.
...D
-
-
-
-
-
-
-
-
0.25
-
...D
5
5
5
15
25
25
15
MAX.
...E
10
10
10
25
30
30
25
...D, E, F
V
T
V
GT
I
D
On-state voltage
Gate trigger voltage
Off-state leakage current
1.6
1.5
-
0.5
V
V
V
mA
...F
25
25
25
30
40
40
30
mA
mA
mA
mA
mA
mA
mA
UNIT
I
L
Latching current
I
H
Holding current
DYNAMIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL
dV
D
/dt
PARAMETER
Critical rate of rise of
off-state voltage
Critical rate of change of
commutating current
CONDITIONS
BTA212B-
V
DM
= 67% V
DRM(max)
;
T
j
= 110 ˚C; exponential
waveform; gate open
circuit
V
DM
= 400 V; T
j
= 125 ˚C;
I
T(RMS)
= 12 A;
dV
com
/dt = 10V/μs; gate
open circuit
V
DM
= 400 V; T
j
= 125 ˚C;
I
T(RMS)
= 12 A;
dV
com
/dt = 0.1V/μs; gate
open circuit
...D
20
MIN.
...E
60
...F
70
-
V/μs
MAX.
UNIT
dI
com
/dt
1.0
8
21
-
A/ms
dI
com
/dt
Critical rate of change of
commutating current
3.5
16
32
-
A/ms
2
Device does not trigger in the T2-, G+ quadrant.
October 2003
2
Rev 3.000
1;3
Semiconductors
Product specification
Three quadrant triacs
guaranteed commutation
BTA212B series D, E and F
20
Ptot / W
Tmb(max) / C
95
= 180
15
IT(RMS) / A
BT138
15
1
120
90
60
99 C
102.5
10
110
5
10
30
5
117.5
0
0
5
IT(RMS) / A
10
125
15
0
-50
0
50
Tmb / C
100
150
Fig.1. Maximum on-state dissipation, P
tot
, versus rms
on-state current, I
T(RMS)
, where
α
= conduction angle.
Fig.4. Maximum permissible rms current I
T(RMS)
,
versus mounting base temperature T
mb
.
IT(RMS) / A
1000
ITSM / A
25
20
dI
T
/dt limit
100
15
10
IT
T
10
10us
I TSM
time
5
Tj initial = 25 C max
100us
1ms
T/s
10ms
100ms
0
0.01
0.1
1
surge duration / s
10
Fig.2. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus pulse width t
p
, for
sinusoidal currents, t
p
≤
20ms.
ITSM / A
IT
80
T
ITSM
time
Fig.5. Maximum permissible repetitive rms on-state
current I
T(RMS)
, versus surge duration, for sinusoidal
currents, f = 50 Hz; T
mb
≤
99˚C.
VGT(Tj)
VGT(25 C)
100
1.6
1.4
1.2
1
Tj initial = 25 C max
60
40
0.8
20
0.6
0.4
-50
0
1
10
100
Number of cycles at 50Hz
1000
0
50
Tj / C
100
150
Fig.3. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus number of cycles, for
sinusoidal currents, f = 50 Hz.
Fig.6. Normalised gate trigger voltage
V
GT
(T
j
)/ V
GT
(25˚C), versus junction temperature T
j
.
October 2003
3
Rev 3.000
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