74HC173D: 产品描述Flip Flops QUAD D-TYPE 3-STATE; 产品类别逻辑逻辑; 文件大小791KB，共20页; 制造商NXP(恩智浦); 官网地址https://www.nxp.com; 标准

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74HC173D概述

Flip Flops QUAD D-TYPE 3-STATE

74HC173D规格参数

参数名称	属性值
是否无铅	不含铅
是否Rohs认证	符合
厂商名称	NXP(恩智浦)
零件包装代码	SOIC
包装说明	SOP, SOP16,.25
针数	16
Reach Compliance Code	unknown
其他特性	WITH HOLD MODE
系列	HC/UH
JESD-30 代码	R-PDSO-G16
长度	9.9 mm
负载电容（CL）	50 pF
逻辑集成电路类型	D FLIP-FLOP
最大频率@ Nom-Sup	24000000 Hz
最大I（ol）	0.006 A
湿度敏感等级	1
位数	4
功能数量	1
端子数量	16
最高工作温度	125 °C
最低工作温度	-40 °C
输出特性	3-STATE
输出极性	TRUE
封装主体材料	PLASTIC/EPOXY
封装代码	SOP
封装等效代码	SOP16,.25
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE
峰值回流温度（摄氏度）	260
电源	2/6 V
传播延迟（tpd）	53 ns
认证状态	Not Qualified
座面最大高度	1.75 mm
最大供电电压 (Vsup)	6 V
最小供电电压 (Vsup)	2 V
标称供电电压 (Vsup)	5 V
表面贴装	YES
技术	CMOS
温度等级	AUTOMOTIVE
端子面层	NICKEL/PALLADIUM/GOLD (NI/PD/AU)
端子形式	GULL WING
端子节距	1.27 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	30
触发器类型	POSITIVE EDGE
宽度	3.9 mm
最小 fmax	60 MHz
Base Number Matches	1

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74HC173; 74HCT173

Quad D-type flip-flop; positive-edge trigger; 3-state

Rev. 3 — 8 November 2016

Product data sheet

1. General description

The 74HC173; 74HCT173 is a quad positive-edge triggered D-type flip-flop. The device

features clock (CP), master reset (MR), two input enable (E1, E2) and two output enable

(OE1, OE2) inputs. When the input enables are LOW, the outputs Qn will assume the

state of their corresponding Dn inputs that meet the set-up and hold time requirements on

the LOW-to-HIGH clock (CP) transition. A HIGH on either input enable will cause the

device to go into a hold mode, outputs hold their previous state independently of clock and

data inputs. A HIGH on MR forces the outputs LOW independently of clock and data

inputs. A HIGH on either output enable pin causes the outputs to assume a

high-impedance OFF-state. Operation of the output enable inputs does not affect the state

of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting

resistors to interface inputs to voltages in excess of V

2. Features and benefits



Complies with JEDEC standard no. 7A



Input levels:



For 74HC173: CMOS level



For 74HCT173: TTL level



Gated input enable for hold (do nothing) mode



Gated output enable control mode



Edge-triggered D-type register



Asynchronous master reset



ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-A exceeds 200 V



Specified from

40 C

to +85

C

and

40 C

to +125

C

74HC173D相似产品对比

	74HC173D	74HC173PW,118	74HC173PW,112	74HCT173DB,112	74HCT173DB,118	74HCT173D	74HC173PW
描述	Flip Flops QUAD D-TYPE 3-STATE	Flip Flops QUAD D-TYPE 3-STATE	Flip Flops QUAD D-TYPE 3-STATE	Flip Flops QUAD D-TYPE 3-STATE	Flip Flops QUAD D-TYPE 3-STATE	Flip Flops QUAD D F/F 3-STATE	Flip Flops QUAD D-TYPE 3-STATE
是否Rohs认证	符合	符合	符合	符合	符合	符合	符合
零件包装代码	SOIC	TSSOP	TSSOP	SSOP1	SSOP1	SOIC	TSSOP
包装说明	SOP, SOP16,.25	SOT-403-1, TSSOP-16	SOT-403-1, TSSOP-16	SSOP,	SSOP,	SOP, SOP16,.25	SOT-403-1, TSSOP-16
针数	16	16	16	16	16	16	16
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	compliant	unknown
其他特性	WITH HOLD MODE	WITH HOLD MODE	WITH HOLD MODE	WITH HOLD MODE	WITH HOLD MODE	WITH HOLD MODE	WITH HOLD MODE
系列	HC/UH	HC/UH	HC/UH	HCT	HCT	HCT	HC/UH
JESD-30 代码	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16
长度	9.9 mm	5 mm	5 mm	6.2 mm	6.2 mm	9.9 mm	5 mm
负载电容（CL）	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF
逻辑集成电路类型	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP
湿度敏感等级	1	1	1	1	1	1	1
位数	4	4	4	4	4	4	4
功能数量	1	1	1	1	1	1	1
端子数量	16	16	16	16	16	16	16
最高工作温度	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
最低工作温度	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
输出特性	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
输出极性	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	SOP	TSSOP	TSSOP	SSOP	SSOP	SOP	TSSOP
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）	260	260	260	NOT SPECIFIED	260	260	260
传播延迟（tpd）	53 ns	53 ns	53 ns	60 ns	60 ns	60 ns	53 ns
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	1.75 mm	1.1 mm	1.1 mm	2 mm	2 mm	1.75 mm	1.1 mm
最大供电电压 (Vsup)	6 V	6 V	6 V	5.5 V	5.5 V	5.5 V	6 V
最小供电电压 (Vsup)	2 V	2 V	2 V	4.5 V	4.5 V	4.5 V	2 V
标称供电电压 (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V
表面贴装	YES	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
端子面层	NICKEL/PALLADIUM/GOLD (NI/PD/AU)	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD
端子形式	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
端子节距	1.27 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	1.27 mm	0.65 mm
端子位置	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
处于峰值回流温度下的最长时间	30	30	30	NOT SPECIFIED	30	30	30
触发器类型	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
宽度	3.9 mm	4.4 mm	4.4 mm	5.3 mm	5.3 mm	3.9 mm	4.4 mm
最小 fmax	60 MHz	60 MHz	60 MHz	60 MHz	60 MHz	60 MHz	60 MHz
Base Number Matches	1	1	1	-	-	1	1
Brand Name	-	NXP Semiconductor	NXP Semiconductor	NXP Semiconductor	NXP Semiconductor	-	-
制造商包装代码	-	SOT403-1	SOT403-1	SOT338-1	SOT338-1	-	-
JESD-609代码	-	e4	e4	e4	e4	e4	e4

74HC173D

74HC173D在线购买

74HC173D概述

74HC173D规格参数

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