IS61LV5128AL
512K x 8 HIGH-SPEED CMOS STATIC RAM
ISSI
APRIL 2005
®
FEATURES
• High-speed access times:
10, 12 ns
• High-performance, low-power CMOS process
• Multiple center power and ground pins for
greater noise immunity
• Easy memory expansion with
CE
and
OE
options
•
CE
power-down
• Fully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
• Single 3.3V power supply
• Packages available:
– 36-pin 400-mil SOJ
– 36-pin miniBGA
– 44-pin TSOP (Type II)
• Lead-free available
DESCRIPTION
The
ISSI
IS61LV5128AL is a very high-speed, low power,
524,288-word by 8-bit CMOS static RAM. The
IS61LV5128AL is fabricated using
ISSI
's high-perform-
ance CMOS technology. This highly reliable process
coupled with innovative circuit design techniques, yields
higher performance and low power consumption devices.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down to 250 µW (typical) with CMOS input levels.
The IS61LV5128AL operates from a single 3.3V power
supply and all inputs are TTL-compatible.
The IS61LV5128AL is available in 36-pin 400-mil SOJ, 36-
pin mini BGA, and 44-pin TSOP (Type II) packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A18
DECODER
512K X 8
MEMORY ARRAY
V
DD
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CE
OE
WE
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
CONTROL
CIRCUIT
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
04/15/05
1
IS61LV5128AL
ISSI
Value
–0.5 to V
DD
+ 0.5
–65 to +150
1.0
Unit
V
°C
W
®
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
STG
P
T
Parameter
Terminal Voltage with Respect to GND
Storage Temperature
Power Dissipation
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause perma-
nent damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
OPERATING RANGE
V
DD
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
-40°C to +85°C
10ns
3.3V +10%, -5%
3.3V +10%, -5%
12ns
3.3V +10%
3.3V +10%
CAPACITANCE
(1,2)
Symbol
C
IN
C
I/O
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
6
8
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25°C, f = 1 MHz, V
DD
= 3.3V.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
04/15/05
3
IS61LV5128AL
ISSI
Test Conditions
V
DD
= Min., I
OH
= –4.0 mA
V
DD
= Min., I
OL
= 8.0 mA
Min.
2.4
—
2.0
–0.3
GND
≤
V
IN
≤
V
DD
GND
≤
V
OUT
≤
V
DD
, Outputs Disabled
Com.
Ind.
Com.
Ind.
–2
–5
–2
–5
Max.
—
0.4
V
DD
+ 0.3
0.8
2
5
2
5
Unit
V
V
V
V
µA
µA
®
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol Parameter
V
OH
V
OL
V
IH
V
IL
I
LI
I
LO
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Note:
1. V
IL
= –3.0V for pulse width less than 10 ns.
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter
I
CC
I
SB
V
DD
Dynamic Operating
Supply Current
TTL Standby Current
(TTL Inputs)
TTL Standby Current
(TTL Inputs)
CMOS Standby
Current (CMOS Inputs)
Test Conditions
V
DD
= Max.,
Com.
I
OUT
= 0 mA, f = f
MAX
Ind.
V
DD
= Max.,
V
IN
= V
IH
or V
IL
CE
≥
V
IH
, f = f
MAX
.
V
DD
= Max.,
V
IN
= V
IH
or V
IL
CE
≥
V
IH
, f = 0
Com.
Ind.
Com.
Ind.
-10
Min. Max.
—
—
—
—
—
—
—
—
90
95
40
45
20
25
15
20
-12
Min. Max.
—
—
—
—
—
—
—
—
85
90
35
40
20
25
15
20
Unit
mA
mA
I
SB
1
mA
I
SB
2
V
DD
= Max.,
Com.
CE
≥
V
DD
– 0.2V,
Ind.
V
IN
≥
V
DD
– 0.2V, or
V
IN
≤
0.2V, f = 0
mA
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
4
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
04/15/05
IS61LV5128AL
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE
Access Time
OE
Access Time
OE
to High-Z Output
OE
to Low-Z Output
CE
to High-Z Output
CE
to Low-Z Output
Power Up Time
Power Down Time
-10
Min. Max.
10
—
2
—
—
—
0
0
3
0
—
—
10
—
10
4
4
—
4
—
—
10
-12
Min. Max.
12
—
2
—
—
—
0
0
3
0
—
—
12
—
12
5
5
—
6
—
—
12
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ISSI
®
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
HZOE
(2)
t
LZOE
(2)
t
HZCE
(2
t
LZCE
(2)
t
PU
t
PD
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse
levels of 0V to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
319
Ω
3.3V
3.3V
319
Ω
OUTPUT
30 pF
Including
jig and
scope
353
Ω
OUTPUT
5 pF
Including
jig and
scope
353
Ω
Figure 1
Figure 2
5
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
04/15/05
stm32/stm8
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